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Nobuhiro Iwamatsu047375b2007-09-23 02:19:24 +09001/*
2 * Configuation settings for the Hitachi Solution Engine 7750
3 *
4 * Copyright (C) 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
5 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02006 * SPDX-License-Identifier: GPL-2.0+
Nobuhiro Iwamatsu047375b2007-09-23 02:19:24 +09007 */
8
9#ifndef __MS7750SE_H
10#define __MS7750SE_H
Nobuhiro Iwamatsu69df3c42007-05-13 21:01:03 +090011
Nobuhiro Iwamatsu69df3c42007-05-13 21:01:03 +090012#define CONFIG_CPU_SH7750 1
Nobuhiro Iwamatsu047375b2007-09-23 02:19:24 +090013/* #define CONFIG_CPU_SH7751 1 */
14/* #define CONFIG_CPU_TYPE_R 1 */
Nobuhiro Iwamatsu69df3c42007-05-13 21:01:03 +090015#define CONFIG_MS7750SE 1
16#define __LITTLE_ENDIAN__ 1
17
Nobuhiro Iwamatsu047375b2007-09-23 02:19:24 +090018/*
19 * Command line configuration.
20 */
Jean-Christophe PLAGNIOL-VILLARD6c58a032008-08-13 01:40:38 +020021#define CONFIG_SCIF_CONSOLE 1
Nobuhiro Iwamatsu69df3c42007-05-13 21:01:03 +090022#define CONFIG_BAUDRATE 38400
23#define CONFIG_CONS_SCIF1 1
Helmut Raiger9660e442011-10-20 04:19:47 +000024#define CONFIG_BOARD_LATE_INIT
Nobuhiro Iwamatsu69df3c42007-05-13 21:01:03 +090025
Nobuhiro Iwamatsu69df3c42007-05-13 21:01:03 +090026#define CONFIG_BOOTDELAY -1
Wolfgang Denk53677ef2008-05-20 16:00:29 +020027#define CONFIG_BOOTARGS "console=ttySC0,38400"
Nobuhiro Iwamatsu69df3c42007-05-13 21:01:03 +090028#define CONFIG_ENV_OVERWRITE 1
29
Nobuhiro Iwamatsu047375b2007-09-23 02:19:24 +090030/* SDRAM */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020031#define CONFIG_SYS_SDRAM_BASE (0x8C000000)
32#define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024)
Nobuhiro Iwamatsu69df3c42007-05-13 21:01:03 +090033
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020034#define CONFIG_SYS_LONGHELP
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020035#define CONFIG_SYS_CBSIZE 256
36#define CONFIG_SYS_PBSIZE 256
37#define CONFIG_SYS_MAXARGS 16
38#define CONFIG_SYS_BARGSIZE 512
Nobuhiro Iwamatsu69df3c42007-05-13 21:01:03 +090039
Nobuhiro Iwamatsuda8241b2011-01-17 21:08:58 +090040#define CONFIG_SYS_TEXT_BASE 0x8FFC0000
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020041#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
Wolfgang Denk14d0a022010-10-07 21:51:12 +020042#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000)
Nobuhiro Iwamatsu69df3c42007-05-13 21:01:03 +090043
Nobuhiro Iwamatsu047375b2007-09-23 02:19:24 +090044/* NOR Flash */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020045/* #define CONFIG_SYS_FLASH_BASE (0xA1000000)*/
46#define CONFIG_SYS_FLASH_BASE (0xA0000000)
47#define CONFIG_SYS_MAX_FLASH_BANKS (1) /* Max number of
Wolfgang Denk53677ef2008-05-20 16:00:29 +020048 * Flash memory banks
49 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020050#define CONFIG_SYS_MAX_FLASH_SECT 142
51#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
Nobuhiro Iwamatsu69df3c42007-05-13 21:01:03 +090052
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020053#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024)
54#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE) /* Address of u-boot image in Flash */
55#define CONFIG_SYS_MONITOR_LEN (128 * 1024)
56#define CONFIG_SYS_MALLOC_LEN (256 * 1024) /* Size of DRAM reserved for malloc() use */
Nobuhiro Iwamatsu69df3c42007-05-13 21:01:03 +090057
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020058#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
59#define CONFIG_SYS_RX_ETH_BUFFER (8)
Nobuhiro Iwamatsu69df3c42007-05-13 21:01:03 +090060
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020061#define CONFIG_SYS_FLASH_CFI
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +020062#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020063#undef CONFIG_SYS_FLASH_CFI_BROKEN_TABLE
64#undef CONFIG_SYS_FLASH_QUIET_TEST
65#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
Nobuhiro Iwamatsu69df3c42007-05-13 21:01:03 +090066
Nobuhiro Iwamatsu69df3c42007-05-13 21:01:03 +090067
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +020068#define CONFIG_ENV_IS_IN_FLASH
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +020069#define CONFIG_ENV_SECT_SIZE 0x20000
70#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020071#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
72#define CONFIG_SYS_FLASH_ERASE_TOUT 120000
73#define CONFIG_SYS_FLASH_WRITE_TOUT 500
Nobuhiro Iwamatsu69df3c42007-05-13 21:01:03 +090074
Nobuhiro Iwamatsu047375b2007-09-23 02:19:24 +090075/* Board Clock */
Nobuhiro Iwamatsu69df3c42007-05-13 21:01:03 +090076#define CONFIG_SYS_CLK_FREQ 33333333
Nobuhiro Iwamatsu684a5012013-08-21 16:11:21 +090077#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
78#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
Jean-Christophe PLAGNIOL-VILLARDbe45c632009-06-04 12:06:48 +020079#define CONFIG_SYS_TMU_CLK_DIV 4
Nobuhiro Iwamatsu69df3c42007-05-13 21:01:03 +090080
Nobuhiro Iwamatsu047375b2007-09-23 02:19:24 +090081#endif /* __MS7750SE_H */