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Sergey Kubushync74b2102007-08-10 20:26:18 +02001/*
2 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
3 *
4 * Board-specific low level initialization code. Called at the very end
Peter Tyser84ad6882010-04-12 22:28:11 -05005 * of arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S. Just returns if there is no
Sergey Kubushync74b2102007-08-10 20:26:18 +02006 * initialization required.
7 *
8 * For _OLDER_ Sonata boards sets up GPIO4 to control NAND WP line. Newer
9 * Sonata boards, AFAIK, don't use this so it's just return by default. Ask
10 * Visioneering if they reinvented the wheel once again to make sure :)
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA
26 */
27
28#include <config.h>
29
30.globl dv_board_init
31dv_board_init:
32#ifdef SONATA_BOARD_GPIOWP
33 /* Set PINMUX0 to enable GPIO4 */
34 ldr r0, _PINMUX0
35 ldr r1, GPIO4_EN_MASK
36 ldr r2, [r0]
37 and r2, r2, r1
38 str r2, [r0]
39
40 /* Enable GPIO LPSC module */
41 ldr r0, PTSTAT
42
43gpio_ptstat_loop1:
44 ldr r2, [r0]
45 tst r2, $0x00000001
46 bne gpio_ptstat_loop1
47
48 ldr r1, MDCTL_GPIO
49 ldr r2, [r1]
50 and r2, r2, $0xfffffff8
51 orr r2, r2, $0x00000003
52 str r2, [r1]
53
54 orr r2, r2, $0x00000200
55 str r2, [r1]
56
57 ldr r1, PTCMD
58 mov r2, $0x00000001
59 str r2, [r1]
60
61gpio_ptstat_loop2:
62 ldr r2, [r0]
63 tst r2, $0x00000001
64 bne gpio_ptstat_loop2
65
66 ldr r0, MDSTAT_GPIO
67gpio_mdstat_loop:
68 ldr r2, [r0]
69 and r2, r2, $0x0000001f
70 teq r2, $0x00000003
71 bne gpio_mdstat_loop
72
73 /* GPIO4 -> output */
74 ldr r0, GPIO_DIR01
75 mov r1, $0x10
76 ldr r2, [r0]
77 bic r2, r2, r0
78 str r2, [r0]
79
80 /* Set it to 0 (Write Protect) */
81 ldr r0, GPIO_CLR_DATA01
82 str r1, [r0]
83#endif
84
85 mov pc, lr
86
87#ifdef SONATA_BOARD_GPIOWP
88.ltorg
89
90GPIO4_EN_MASK:
91 .word 0xf77fffff
92MDCTL_GPIO:
93 .word 0x01c41a68
94MDSTAT_GPIO:
95 .word 0x01c41868
96GPIO_DIR01:
97 .word 0x01c67010
98GPIO_CLR_DATA01:
99 .word 0x01c6701c
100#endif