blob: f27ad37b701e2e60a7b03e562111fae17b79e82b [file] [log] [blame]
Tom Warrenf4ef6662011-04-14 12:09:41 +00001/*
2 * (C) Copyright 2010,2011
3 * NVIDIA Corporation <www.nvidia.com>
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <asm/io.h>
26#include <asm/arch/tegra2.h>
Simon Glasse712e542012-01-11 12:42:27 +000027#include <asm/arch/clock.h>
28#include <asm/arch/funcmux.h>
Stephen Warrenae036612011-10-31 06:51:35 +000029#include <asm/arch/pinmux.h>
Thierry Reding977a39e2011-11-17 00:10:23 +000030#include <asm/arch/mmc.h>
Stephen Warren98778412011-10-31 06:51:36 +000031#include <asm/gpio.h>
Tom Warren3f82d892012-05-22 11:44:48 +000032#ifdef CONFIG_TEGRA_MMC
Tom Warrenccf79882011-09-21 12:40:07 +000033#include <mmc.h>
34#endif
Tom Warrenf4ef6662011-04-14 12:09:41 +000035
36/*
37 * Routine: gpio_config_uart
38 * Description: Does nothing on Harmony - no conflict w/SPI.
39 */
40void gpio_config_uart(void)
41{
42}
Tom Warrenccf79882011-09-21 12:40:07 +000043
Tom Warren3f82d892012-05-22 11:44:48 +000044#ifdef CONFIG_TEGRA_MMC
Tom Warrenccf79882011-09-21 12:40:07 +000045/*
Stephen Warrenae036612011-10-31 06:51:35 +000046 * Routine: pin_mux_mmc
47 * Description: setup the pin muxes/tristate values for the SDMMC(s)
48 */
49static void pin_mux_mmc(void)
50{
Simon Glasse712e542012-01-11 12:42:27 +000051 funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT);
52 funcmux_select(PERIPH_ID_SDMMC2, FUNCMUX_SDMMC2_DTA_DTD_8BIT);
Stephen Warrenae036612011-10-31 06:51:35 +000053
54 /* For power GPIO PI6 */
55 pinmux_tristate_disable(PINGRP_ATA);
56 /* For CD GPIO PH2 */
57 pinmux_tristate_disable(PINGRP_ATD);
58
Stephen Warrenae036612011-10-31 06:51:35 +000059 /* For power GPIO PT3 */
60 pinmux_tristate_disable(PINGRP_DTB);
61 /* For CD GPIO PI5 */
62 pinmux_tristate_disable(PINGRP_ATC);
63}
64
Tom Warrenccf79882011-09-21 12:40:07 +000065/* this is a weak define that we are overriding */
Stephen Warrenae036612011-10-31 06:51:35 +000066int board_mmc_init(bd_t *bd)
67{
68 debug("board_mmc_init called\n");
69
70 /* Enable muxes, etc. for SDMMC controllers */
71 pin_mux_mmc();
Stephen Warrenae036612011-10-31 06:51:35 +000072
73 debug("board_mmc_init: init SD slot J26\n");
74 /* init dev 0, SD slot J26, with 4-bit bus */
75 /* The board has an 8-bit bus, but 8-bit doesn't work yet */
Stephen Warren98778412011-10-31 06:51:36 +000076 tegra2_mmc_init(0, 4, GPIO_PI6, GPIO_PH2);
Stephen Warrenae036612011-10-31 06:51:35 +000077
78 debug("board_mmc_init: init SD slot J5\n");
79 /* init dev 2, SD slot J5, with 4-bit bus */
Stephen Warren98778412011-10-31 06:51:36 +000080 tegra2_mmc_init(2, 4, GPIO_PT3, GPIO_PI5);
Stephen Warrenae036612011-10-31 06:51:35 +000081
82 return 0;
83}
Tom Warrenccf79882011-09-21 12:40:07 +000084#endif