| wdenk | 42d1f03 | 2003-10-15 23:53:47 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2003 Motorola Inc. |
| 3 | * Xianghua Xiao (x.xiao@motorola.com) |
| 4 | * |
| 5 | * See file CREDITS for list of people who contributed to this |
| 6 | * project. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | */ |
| 23 | |
| 24 | /* |
| 25 | * PCI Configuration space access support for MPC85xx PCI Bridge |
| 26 | */ |
| 27 | #include <common.h> |
| 28 | #include <asm/cpm_85xx.h> |
| 29 | #include <pci.h> |
| 30 | |
| 31 | #if defined(CONFIG_PCI) |
| 32 | /* |
| 33 | * Initialize PCI Devices, report devices found. |
| 34 | */ |
| 35 | #ifndef CONFIG_PCI_PNP |
| 36 | static struct pci_config_table pci_mpc85xxads_config_table[] = { |
| 37 | { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_IDSEL_NUMBER, PCI_ANY_ID, |
| 38 | pci_cfgfunc_config_device, { PCI_ENET0_IOADDR, |
| 39 | PCI_ENET0_MEMADDR, |
| 40 | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }}, |
| 41 | { } |
| 42 | }; |
| 43 | #endif |
| 44 | |
| 45 | struct pci_controller local_hose = { |
| 46 | #ifndef CONFIG_PCI_PNP |
| 47 | config_table: pci_mpc85xxads_config_table, |
| 48 | #endif |
| 49 | }; |
| 50 | |
| 51 | void pci_init_board(void) |
| 52 | { |
| 53 | struct pci_controller* hose = (struct pci_controller *)&local_hose; |
| 54 | volatile immap_t *immap = (immap_t *)CFG_CCSRBAR; |
| 55 | volatile ccsr_pcix_t *pcix = &immap->im_pcix; |
| 56 | |
| 57 | u16 reg16; |
| 58 | |
| 59 | hose->first_busno = 0; |
| 60 | hose->last_busno = 0xff; |
| 61 | |
| 62 | pci_set_region(hose->regions + 0, |
| 63 | CFG_PCI_MEM_BASE, |
| 64 | CFG_PCI_MEM_PHYS, |
| 65 | (CFG_PCI_MEM_SIZE/2), |
| 66 | PCI_REGION_MEM); |
| 67 | |
| 68 | pci_set_region(hose->regions + 1, |
| 69 | (CFG_PCI_MEM_BASE+0x08000000), |
| 70 | (CFG_PCI_MEM_PHYS+0x08000000), |
| 71 | 0x1000000, /* 16M */ |
| 72 | PCI_REGION_IO); |
| 73 | |
| 74 | hose->region_count = 2; |
| 75 | |
| 76 | pci_setup_indirect(hose, |
| 77 | (CFG_IMMR+0x8000), |
| 78 | (CFG_IMMR+0x8004)); |
| 79 | |
| 80 | pci_register_hose(hose); |
| 81 | |
| 82 | hose->last_busno = pci_hose_scan(hose); |
| 83 | |
| 84 | pci_read_config_word (PCI_BDF(0,0,0), PCI_COMMAND, ®16); |
| 85 | reg16 |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY; |
| 86 | pci_write_config_word(PCI_BDF(0,0,0), PCI_COMMAND, reg16); |
| 87 | |
| 88 | /* Clear non-reserved bits in status register */ |
| 89 | pci_write_config_word(PCI_BDF(0,0,0), PCI_STATUS, 0xffff); |
| 90 | pci_write_config_byte(PCI_BDF(0,0,0), PCI_LATENCY_TIMER,0x80); |
| 91 | |
| 92 | pcix->potar1 = (CFG_PCI_MEM_BASE >> 12) & 0x000fffff; |
| 93 | pcix->potear1 = 0x00000000; |
| 94 | pcix->powbar1 = (CFG_PCI_MEM_BASE >> 12) & 0x000fffff; |
| 95 | pcix->powbear1 = 0x00000000; |
| 96 | pcix->powar1 = 0x8004401a; /* 128M MEM space */ |
| 97 | pcix->potar2 = ((CFG_PCI_MEM_BASE + 0x08000000) >> 12) & 0x000fffff; |
| 98 | pcix->potear2 = 0x00000000; |
| 99 | pcix->powbar2 = ((CFG_PCI_MEM_BASE + 0x08000000) >> 12) && 0x000fffff; |
| 100 | pcix->powbear2 = 0x00000000; |
| 101 | pcix->powar2 = 0x80088017; /* 16M IO space */ |
| 102 | pcix->pitar1 = 0x00000000; |
| 103 | pcix->piwbar1 = 0x00000000; |
| 104 | pcix->piwar1 = 0xa0F5501f; |
| 105 | |
| 106 | } |
| 107 | #endif /* CONFIG_PCI */ |