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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Wolfgang Denkad5bb452007-03-06 18:08:43 +01002/*
3 * (C) Copyright 2002
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
Wolfgang Denkad5bb452007-03-06 18:08:43 +01005 */
6
7#include <common.h>
Simon Glass36bf4462019-11-14 12:57:42 -07008#include <irq_func.h>
Wolfgang Denkad5bb452007-03-06 18:08:43 +01009
10/*
11 * CPU test
12 * Binary instructions instr rA,rS
13 *
14 * Logic instructions: cntlzw
15 * Arithmetic instructions: extsb, extsh
16
17 * The test contains a pre-built table of instructions, operands and
18 * expected results. For each table entry, the test will cyclically use
19 * different sets of operand registers and result registers.
20 */
21
Wolfgang Denkad5bb452007-03-06 18:08:43 +010022#include <post.h>
23#include "cpu_asm.h"
24
Tom Rini1e019502022-12-04 10:14:17 -050025#if CFG_POST & CFG_SYS_POST_CPU
Wolfgang Denkad5bb452007-03-06 18:08:43 +010026
27extern void cpu_post_exec_21 (ulong *code, ulong *cr, ulong *res, ulong op1);
28extern ulong cpu_post_makecr (long v);
29
30static struct cpu_post_twox_s
31{
32 ulong cmd;
33 ulong op;
34 ulong res;
35} cpu_post_twox_table[] =
36{
37 {
Wolfgang Denk53677ef2008-05-20 16:00:29 +020038 OP_EXTSB,
Wolfgang Denkad5bb452007-03-06 18:08:43 +010039 3,
40 3
41 },
42 {
Wolfgang Denk53677ef2008-05-20 16:00:29 +020043 OP_EXTSB,
Wolfgang Denkad5bb452007-03-06 18:08:43 +010044 0xff,
45 -1
46 },
47 {
Wolfgang Denk53677ef2008-05-20 16:00:29 +020048 OP_EXTSH,
Wolfgang Denkad5bb452007-03-06 18:08:43 +010049 3,
50 3
51 },
52 {
Wolfgang Denk53677ef2008-05-20 16:00:29 +020053 OP_EXTSH,
Wolfgang Denkad5bb452007-03-06 18:08:43 +010054 0xff,
55 0xff
56 },
57 {
Wolfgang Denk53677ef2008-05-20 16:00:29 +020058 OP_EXTSH,
Wolfgang Denkad5bb452007-03-06 18:08:43 +010059 0xffff,
60 -1
61 },
62 {
Wolfgang Denk53677ef2008-05-20 16:00:29 +020063 OP_CNTLZW,
Wolfgang Denkad5bb452007-03-06 18:08:43 +010064 0x000fffff,
65 12
66 },
67};
Mike Frysingerd2397812011-05-10 07:28:35 +000068static unsigned int cpu_post_twox_size = ARRAY_SIZE(cpu_post_twox_table);
Wolfgang Denkad5bb452007-03-06 18:08:43 +010069
70int cpu_post_test_twox (void)
71{
72 int ret = 0;
73 unsigned int i, reg;
74 int flag = disable_interrupts();
75
76 for (i = 0; i < cpu_post_twox_size && ret == 0; i++)
77 {
78 struct cpu_post_twox_s *test = cpu_post_twox_table + i;
79
80 for (reg = 0; reg < 32 && ret == 0; reg++)
81 {
82 unsigned int reg0 = (reg + 0) % 32;
83 unsigned int reg1 = (reg + 1) % 32;
84 unsigned int stk = reg < 16 ? 31 : 15;
Wolfgang Denk53677ef2008-05-20 16:00:29 +020085 unsigned long code[] =
Wolfgang Denkad5bb452007-03-06 18:08:43 +010086 {
87 ASM_STW(stk, 1, -4),
88 ASM_ADDI(stk, 1, -16),
89 ASM_STW(3, stk, 8),
90 ASM_STW(reg0, stk, 4),
91 ASM_STW(reg1, stk, 0),
92 ASM_LWZ(reg0, stk, 8),
93 ASM_11X(test->cmd, reg1, reg0),
94 ASM_STW(reg1, stk, 8),
95 ASM_LWZ(reg1, stk, 0),
96 ASM_LWZ(reg0, stk, 4),
97 ASM_LWZ(3, stk, 8),
98 ASM_ADDI(1, stk, 16),
99 ASM_LWZ(stk, 1, -4),
100 ASM_BLR,
101 };
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200102 unsigned long codecr[] =
Wolfgang Denkad5bb452007-03-06 18:08:43 +0100103 {
104 ASM_STW(stk, 1, -4),
105 ASM_ADDI(stk, 1, -16),
106 ASM_STW(3, stk, 8),
107 ASM_STW(reg0, stk, 4),
108 ASM_STW(reg1, stk, 0),
109 ASM_LWZ(reg0, stk, 8),
110 ASM_11X(test->cmd, reg1, reg0) | BIT_C,
111 ASM_STW(reg1, stk, 8),
112 ASM_LWZ(reg1, stk, 0),
113 ASM_LWZ(reg0, stk, 4),
114 ASM_LWZ(3, stk, 8),
115 ASM_ADDI(1, stk, 16),
116 ASM_LWZ(stk, 1, -4),
117 ASM_BLR,
118 };
119 ulong res;
120 ulong cr;
121
122 if (ret == 0)
123 {
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200124 cr = 0;
125 cpu_post_exec_21 (code, & cr, & res, test->op);
Wolfgang Denkad5bb452007-03-06 18:08:43 +0100126
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200127 ret = res == test->res && cr == 0 ? 0 : -1;
Wolfgang Denkad5bb452007-03-06 18:08:43 +0100128
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200129 if (ret != 0)
130 {
Wolfgang Denk93e14592013-10-04 17:43:24 +0200131 post_log ("Error at twox test %d !\n", i);
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200132 }
Wolfgang Denkad5bb452007-03-06 18:08:43 +0100133 }
134
135 if (ret == 0)
136 {
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200137 cpu_post_exec_21 (codecr, & cr, & res, test->op);
Wolfgang Denkad5bb452007-03-06 18:08:43 +0100138
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200139 ret = res == test->res &&
Wolfgang Denkad5bb452007-03-06 18:08:43 +0100140 (cr & 0xe0000000) == cpu_post_makecr (res) ? 0 : -1;
141
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200142 if (ret != 0)
143 {
Wolfgang Denk93e14592013-10-04 17:43:24 +0200144 post_log ("Error at twox test %d !\n", i);
145 }
Wolfgang Denkad5bb452007-03-06 18:08:43 +0100146 }
147 }
148 }
149
150 if (flag)
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200151 enable_interrupts();
Wolfgang Denkad5bb452007-03-06 18:08:43 +0100152
153 return ret;
154}
155
156#endif