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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Wolfgang Denk9b880bd2005-10-04 23:10:28 +02002/*
3 * (C) Copyright 2005
4 * ARM Ltd.
5 * Peter Pearse, <Peter.Pearse@arm.com>
6 * Configuration for ARM Core Modules.
7 * No standalonw port yet available
8 * - this file is included by both integratorap.h & integratorcp.h
Wolfgang Denk9b880bd2005-10-04 23:10:28 +02009 */
10
11#ifndef __ARMCOREMODULE_H
12#define __ARMCOREMODULE_H
13
Wolfgang Denk53677ef2008-05-20 16:00:29 +020014#define CM_BASE 0x10000000
Wolfgang Denk9b880bd2005-10-04 23:10:28 +020015
16/* CM registers common to all CMs */
17/* Note that observed values after reboot into the ARM Boot Monitor
18 have been used as defaults, rather than the POR values */
Wolfgang Denk53677ef2008-05-20 16:00:29 +020019#define OS_CTRL 0x0000000C
Wolfgang Denk9b880bd2005-10-04 23:10:28 +020020#define CMMASK_REMAP 0x00000005 /* set remap & led */
21#define CMMASK_RESET 0x00000008
Wolfgang Denk53677ef2008-05-20 16:00:29 +020022#define OS_LOCK 0x00000014
23#define CMVAL_LOCK1 0x0000A000 /* locking value */
Wolfgang Denk9b880bd2005-10-04 23:10:28 +020024#define CMVAL_LOCK2 0x0000005F /* locking value */
25#define CMVAL_UNLOCK 0x00000000 /* any value != CM_LOCKVAL */
26#define OS_SDRAM 0x00000020
Wolfgang Denk53677ef2008-05-20 16:00:29 +020027#define OS_INIT 0x00000024
Wolfgang Denk9b880bd2005-10-04 23:10:28 +020028#define CMMASK_MAP_SIMPLE 0xFFFDFFFF /* simple mapping */
29#define CMMASK_TCRAM_DISABLE 0xFFFEFFFF /* TCRAM disabled */
30#define CMMASK_LOWVEC 0x00000000 /* vectors @ 0x00000000 */
31#define CMMASK_LE 0xFFFFFFF7 /* little endian */
32#define CMMASK_CMxx6_COMMON 0x00000013 /* Common value for CMxx6 */
33 /* - observed reset value of */
34 /* CM926EJ-S */
35 /* CM1136-EJ-S */
36
Wolfgang Denk9b880bd2005-10-04 23:10:28 +020037#define OS_SPD 0x00000100 /* The SDRAM SPD data is copied here */
Wolfgang Denk9b880bd2005-10-04 23:10:28 +020038
39#endif /* __ARMCOREMODULE_H */