blob: 022ea38d4cfecc97403f16e2886a6fb4f7149029 [file] [log] [blame]
Simon Glasse2d934b2023-07-15 21:39:18 -06001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Modified from coreboot bochs.c
4 */
5
6#define LOG_CATEGORY UCLASS_VIDEO
7
8#include <common.h>
9#include <dm.h>
10#include <log.h>
11#include <pci.h>
12#include <video.h>
13#include <asm/io.h>
Simon Glasse2d934b2023-07-15 21:39:18 -060014#include <linux/sizes.h>
15#include "bochs.h"
16
17static int xsize = CONFIG_VIDEO_BOCHS_SIZE_X;
18static int ysize = CONFIG_VIDEO_BOCHS_SIZE_Y;
19
20static void bochs_write(void *mmio, int index, int val)
21{
22 writew(val, mmio + MMIO_BASE + index * 2);
23}
24
25static int bochs_read(void *mmio, int index)
26{
27 return readw(mmio + MMIO_BASE + index * 2);
28}
29
Bin Mengffe1c832023-07-23 12:40:27 +080030static void bochs_vga_write(void *mmio, int index, uint8_t val)
Simon Glasse2d934b2023-07-15 21:39:18 -060031{
Bin Mengffe1c832023-07-23 12:40:27 +080032 writeb(val, mmio + VGA_BASE + index);
Simon Glasse2d934b2023-07-15 21:39:18 -060033}
34
35static int bochs_init_fb(struct udevice *dev)
36{
37 struct video_uc_plat *plat = dev_get_uclass_plat(dev);
38 struct video_priv *uc_priv = dev_get_uclass_priv(dev);
39 ulong fb;
40 void *mmio;
41 int id, mem;
42
43 log_debug("probing %s at PCI %x\n", dev->name, dm_pci_get_bdf(dev));
44 fb = dm_pci_read_bar32(dev, 0);
45 if (!fb)
46 return log_msg_ret("fb", -EIO);
47
48 /* MMIO bar supported since qemu 3.0+ */
49 mmio = dm_pci_map_bar(dev, PCI_BASE_ADDRESS_2, 0, 0, PCI_REGION_TYPE,
50 PCI_REGION_MEM);
51
52 if (!mmio)
53 return log_msg_ret("map", -EIO);
54
55 /* bochs dispi detection */
56 id = bochs_read(mmio, INDEX_ID);
57 if ((id & 0xfff0) != ID0) {
58 log_debug("ID mismatch\n");
59 return -EPROTONOSUPPORT;
60 }
61 mem = bochs_read(mmio, INDEX_VIDEO_MEMORY_64K) * SZ_64K;
62 log_debug("QEMU VGA: bochs @ %p: %d MiB FB at %lx\n", mmio, mem / SZ_1M,
63 fb);
64
65 uc_priv->xsize = xsize;
66 uc_priv->ysize = ysize;
67 uc_priv->bpix = VIDEO_BPP32;
68
69 /* setup video mode */
70 bochs_write(mmio, INDEX_ENABLE, 0);
71 bochs_write(mmio, INDEX_BANK, 0);
72 bochs_write(mmio, INDEX_BPP, VNBITS(uc_priv->bpix));
73 bochs_write(mmio, INDEX_XRES, xsize);
74 bochs_write(mmio, INDEX_YRES, ysize);
75 bochs_write(mmio, INDEX_VIRT_WIDTH, xsize);
76 bochs_write(mmio, INDEX_VIRT_HEIGHT, ysize);
77 bochs_write(mmio, INDEX_X_OFFSET, 0);
78 bochs_write(mmio, INDEX_Y_OFFSET, 0);
79 bochs_write(mmio, INDEX_ENABLE, ENABLED | LFB_ENABLED);
80
Bin Mengcaae7952023-07-23 12:40:26 +080081 /* disable blanking */
Bin Mengffe1c832023-07-23 12:40:27 +080082 bochs_vga_write(mmio, VGA_ATT_W - VGA_INDEX, VGA_AR_ENABLE_DISPLAY);
Simon Glasse2d934b2023-07-15 21:39:18 -060083
84 plat->base = fb;
85
86 return 0;
87}
88
89static int bochs_video_probe(struct udevice *dev)
90{
91 int ret;
92
93 ret = bochs_init_fb(dev);
94 if (ret)
95 return log_ret(ret);
96
97 return 0;
98}
99
100static int bochs_video_bind(struct udevice *dev)
101{
102 struct video_uc_plat *uc_plat = dev_get_uclass_plat(dev);
103
Bin Menge1a0caf2023-07-23 12:40:32 +0800104 /* Set the frame buffer size per configuration */
105 uc_plat->size = xsize * ysize * 32 / 8;
Simon Glasse2d934b2023-07-15 21:39:18 -0600106 log_debug("%s: Frame buffer size %x\n", __func__, uc_plat->size);
107
108 return 0;
109}
110
111U_BOOT_DRIVER(bochs_video) = {
112 .name = "bochs_video",
113 .id = UCLASS_VIDEO,
114 .bind = bochs_video_bind,
115 .probe = bochs_video_probe,
116};
117
118static struct pci_device_id bochs_video_supported[] = {
119 { PCI_DEVICE(0x1234, 0x1111) },
120 { },
121};
122
123U_BOOT_PCI_DEVICE(bochs_video, bochs_video_supported);