blob: 222e9081c3cb1988a2bfde2e88f4c42a721b0619 [file] [log] [blame]
Simon Glassca831f42016-01-18 20:19:17 -07001/*
2 * Copyright (c) 2015 Google, Inc
3 * Written by Simon Glass <sjg@chromium.org>
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8#ifndef __pch_h
9#define __pch_h
10
Simon Glass1ff4f322016-01-18 20:19:18 -070011#define PCH_RCBA 0xf0
12
13#define BIOS_CTRL_BIOSWE BIT(0)
14
Simon Glassca831f42016-01-18 20:19:17 -070015/* Operations for the Platform Controller Hub */
16struct pch_ops {
17 /**
Bin Meng3e389d82016-02-01 01:40:42 -080018 * get_spi_base() - get the address of SPI base
Simon Glassca831f42016-01-18 20:19:17 -070019 *
20 * @dev: PCH device to check
21 * @sbasep: Returns address of SPI base if available, else 0
22 * @return 0 if OK, -ve on error (e.g. there is no SPI base)
23 */
Bin Meng3e389d82016-02-01 01:40:42 -080024 int (*get_spi_base)(struct udevice *dev, ulong *sbasep);
Simon Glassca831f42016-01-18 20:19:17 -070025
26 /**
Simon Glassca831f42016-01-18 20:19:17 -070027 * set_spi_protect() - set whether SPI flash is protected or not
28 *
29 * @dev: PCH device to adjust
30 * @protect: true to protect, false to unprotect
31 *
32 * @return 0 on success, -ENOSYS if not implemented
33 */
34 int (*set_spi_protect)(struct udevice *dev, bool protect);
Bin Meng384980c2016-02-01 01:40:43 -080035
36 /**
37 * get_gpio_base() - get the address of GPIO base
38 *
39 * @dev: PCH device to check
40 * @gbasep: Returns address of GPIO base if available, else 0
41 * @return 0 if OK, -ve on error (e.g. there is no GPIO base)
42 */
43 int (*get_gpio_base)(struct udevice *dev, u32 *gbasep);
Bin Meng79d4eb62016-02-01 01:40:45 -080044
45 /**
46 * get_io_base() - get the address of IO base
47 *
48 * @dev: PCH device to check
49 * @iobasep: Returns address of IO base if available, else 0
50 * @return 0 if OK, -ve on error (e.g. there is no IO base)
51 */
52 int (*get_io_base)(struct udevice *dev, u32 *iobasep);
Simon Glassca831f42016-01-18 20:19:17 -070053};
54
55#define pch_get_ops(dev) ((struct pch_ops *)(dev)->driver->ops)
56
57/**
Bin Meng3e389d82016-02-01 01:40:42 -080058 * pch_get_spi_base() - get the address of SPI base
Simon Glassca831f42016-01-18 20:19:17 -070059 *
60 * @dev: PCH device to check
61 * @sbasep: Returns address of SPI base if available, else 0
62 * @return 0 if OK, -ve on error (e.g. there is no SPI base)
63 */
Bin Meng3e389d82016-02-01 01:40:42 -080064int pch_get_spi_base(struct udevice *dev, ulong *sbasep);
Simon Glassca831f42016-01-18 20:19:17 -070065
66/**
Simon Glassca831f42016-01-18 20:19:17 -070067 * set_spi_protect() - set whether SPI flash is protected or not
68 *
69 * @dev: PCH device to adjust
70 * @protect: true to protect, false to unprotect
71 *
72 * @return 0 on success, -ENOSYS if not implemented
73 */
74int pch_set_spi_protect(struct udevice *dev, bool protect);
75
Bin Meng384980c2016-02-01 01:40:43 -080076/**
77 * pch_get_gpio_base() - get the address of GPIO base
78 *
79 * @dev: PCH device to check
80 * @gbasep: Returns address of GPIO base if available, else 0
81 * @return 0 if OK, -ve on error (e.g. there is no GPIO base)
82 */
83int pch_get_gpio_base(struct udevice *dev, u32 *gbasep);
84
Bin Meng79d4eb62016-02-01 01:40:45 -080085/**
86 * pch_get_io_base() - get the address of IO base
87 *
88 * @dev: PCH device to check
89 * @iobasep: Returns address of IO base if available, else 0
90 * @return 0 if OK, -ve on error (e.g. there is no IO base)
91 */
92int pch_get_io_base(struct udevice *dev, u32 *iobasep);
93
Simon Glassca831f42016-01-18 20:19:17 -070094#endif