blob: 11ab5afc471076b71882965c11741a74d607bf44 [file] [log] [blame]
Stefan Roeseb79316f2005-08-15 12:31:23 +02001/*
2* Copyright (C) 2005 Sandburst Corporation
3*
4* See file CREDITS for list of people who contributed to this
5* project.
6*
7* This program is free software; you can redistribute it and/or
8* modify it under the terms of the GNU General Public License as
9* published by the Free Software Foundation; either version 2 of
10* the License, or (at your option) any later version.
11*
12* This program is distributed in the hope that it will be useful,
13* but WITHOUT ANY WARRANTY; without even the implied warranty of
14* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15* GNU General Public License for more details.
16*
17* You should have received a copy of the GNU General Public License
18* along with this program; if not, write to the Free Software
19* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20* MA 02111-1307 USA
21*/
22/*
23 * Ported from Ebony init.S by Travis B. Sawyer
24 */
25
26#include <ppc_asm.tmpl>
Stefan Roesecf6eb6d2010-04-14 13:57:18 +020027#include <asm/mmu.h>
Stefan Roeseb79316f2005-08-15 12:31:23 +020028#include <config.h>
Stefan Roese550650d2010-09-20 16:05:31 +020029#include <asm/ppc4xx.h>
Stefan Roeseb79316f2005-08-15 12:31:23 +020030
Stefan Roeseb79316f2005-08-15 12:31:23 +020031/**************************************************************************
32 * TLB TABLE
33 *
34 * This table is used by the cpu boot code to setup the initial tlb
35 * entries. Rather than make broad assumptions in the cpu source tree,
36 * this table lets each board set things up however they like.
37 *
38 * Pointer to the table is returned in r1
39 *
40 *************************************************************************/
41
42 .section .bootpg,"ax"
43 .globl tlbtab
44
45tlbtab:
46 tlbtab_start
Stefan Roesecf6eb6d2010-04-14 13:57:18 +020047 tlbentry( 0xf0000000, SZ_256M, 0xf0000000, 1, AC_RWX | SA_IG)
48 tlbentry( CONFIG_SYS_PERIPHERAL_BASE, SZ_256M, 0x40000000, 1, AC_RW | SA_IG)
49 tlbentry( CONFIG_SYS_ISRAM_BASE, SZ_256K, 0x80000000, 0, AC_RWX | SA_IG)
50 tlbentry( CONFIG_SYS_SDRAM_BASE, SZ_256M, 0x00000000, 0, AC_RWX | SA_IG )
51 tlbentry( CONFIG_SYS_SDRAM_BASE+0x10000000, SZ_256M, 0x10000000, 0, AC_RWX | SA_IG )
52 tlbentry( CONFIG_SYS_SDRAM_BASE+0x20000000, SZ_256M, 0x20000000, 0, AC_RWX | SA_IG )
53 tlbentry( CONFIG_SYS_SDRAM_BASE+0x30000000, SZ_256M, 0x30000000, 0, AC_RWX | SA_IG )
54 tlbentry( CONFIG_SYS_PCI_BASE, SZ_256M, 0x00000000, 2, AC_RW | SA_IG )
55 tlbentry( CONFIG_SYS_PCI_MEMBASE, SZ_256M, 0x00000000, 3, AC_RW | SA_IG )
Stefan Roeseb79316f2005-08-15 12:31:23 +020056 tlbtab_end