blob: 65fb70ad73041058348070c8c051ae2fae23144b [file] [log] [blame]
Sergei Poselenov5d108ac2008-04-30 11:42:50 +02001/*
2 * (C) Copyright 2008
3 * Sergei Poselenov, Emcraft Systems, sposelenov@emcraft.com.
4 *
5 * Copyright 2004 Freescale Semiconductor.
6 * (C) Copyright 2002,2003, Motorola Inc.
7 * Xianghua Xiao, (X.Xiao@motorola.com)
8 *
9 * (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
10 *
11 * See file CREDITS for list of people who contributed to this
12 * project.
13 *
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License as
16 * published by the Free Software Foundation; either version 2 of
17 * the License, or (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 * MA 02111-1307 USA
28 */
29
30#include <common.h>
31#include <pci.h>
32#include <asm/processor.h>
33#include <asm/immap_85xx.h>
34#include <ioports.h>
35#include <flash.h>
Sergei Poselenove18575d2008-05-07 15:10:49 +020036#include <libfdt.h>
37#include <fdt_support.h>
Andy Fleminge1eb0e22008-06-10 18:49:34 -050038#include <asm/io.h>
u-boot@bugs.denx.defb661ea2008-09-11 15:40:01 +020039#include <i2c.h>
40#include <mb862xx.h>
41#include <video_fb.h>
Sergei Poselenov59abd152008-06-06 15:42:41 +020042#include "upm_table.h"
Detlev Zundel3e79b582008-08-15 15:42:12 +020043
Sergei Poselenov5d108ac2008-04-30 11:42:50 +020044DECLARE_GLOBAL_DATA_PTR;
45
46extern flash_info_t flash_info[]; /* FLASH chips info */
u-boot@bugs.denx.defb661ea2008-09-11 15:40:01 +020047extern GraphicDevice mb862xx;
Sergei Poselenov5d108ac2008-04-30 11:42:50 +020048
49void local_bus_init (void);
50ulong flash_get_size (ulong base, int banknum);
51
52int checkboard (void)
53{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020054 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
Wolfgang Denkf0c0b3a2011-05-04 10:32:28 +000055 char buf[64];
Sergei Poselenov5e1882d2008-05-27 13:47:00 +020056 int f;
Wolfgang Denkf0c0b3a2011-05-04 10:32:28 +000057 int i = getenv_f("serial#", buf, sizeof(buf));
58#ifdef CONFIG_PCI
59 char *src;
60#endif
Sergei Poselenov5d108ac2008-04-30 11:42:50 +020061
62 puts("Board: Socrates");
Wolfgang Denkf0c0b3a2011-05-04 10:32:28 +000063 if (i > 0) {
Sergei Poselenov5d108ac2008-04-30 11:42:50 +020064 puts(", serial# ");
Wolfgang Denkf0c0b3a2011-05-04 10:32:28 +000065 puts(buf);
Sergei Poselenov5d108ac2008-04-30 11:42:50 +020066 }
67 putc('\n');
68
69#ifdef CONFIG_PCI
Andy Fleminge1eb0e22008-06-10 18:49:34 -050070 /* Check the PCI_clk sel bit */
71 if (in_be32(&gur->porpllsr) & (1<<15)) {
Sergei Poselenov5e1882d2008-05-27 13:47:00 +020072 src = "SYSCLK";
73 f = CONFIG_SYS_CLK_FREQ;
74 } else {
75 src = "PCI_CLK";
76 f = CONFIG_PCI_CLK_FREQ;
77 }
78 printf ("PCI1: 32 bit, %d MHz (%s)\n", f/1000000, src);
Sergei Poselenov5d108ac2008-04-30 11:42:50 +020079#else
80 printf ("PCI1: disabled\n");
81#endif
82
83 /*
84 * Initialize local bus.
85 */
86 local_bus_init ();
Sergei Poselenov5d108ac2008-04-30 11:42:50 +020087 return 0;
88}
89
90int misc_init_r (void)
91{
Sergei Poselenov5d108ac2008-04-30 11:42:50 +020092 /*
93 * Adjust flash start and offset to detected values
94 */
95 gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
96 gd->bd->bi_flashoffset = 0;
97
98 /*
99 * Check if boot FLASH isn't max size
100 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200101 if (gd->bd->bi_flashsize < (0 - CONFIG_SYS_FLASH0)) {
Becky Brucef51cdaf2010-06-17 11:37:20 -0500102 set_lbc_or(0, gd->bd->bi_flashstart |
103 (CONFIG_SYS_OR0_PRELIM & 0x00007fff));
104 set_lbc_br(0, gd->bd->bi_flashstart |
105 (CONFIG_SYS_BR0_PRELIM & 0x00007fff));
Sergei Poselenov5d108ac2008-04-30 11:42:50 +0200106
107 /*
108 * Re-check to get correct base address
109 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200110 flash_get_size(gd->bd->bi_flashstart, CONFIG_SYS_MAX_FLASH_BANKS - 1);
Sergei Poselenov5d108ac2008-04-30 11:42:50 +0200111 }
112
113 /*
114 * Check if only one FLASH bank is available
115 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200116 if (gd->bd->bi_flashsize != CONFIG_SYS_MAX_FLASH_BANKS * (0 - CONFIG_SYS_FLASH0)) {
Becky Brucef51cdaf2010-06-17 11:37:20 -0500117 set_lbc_or(1, 0);
118 set_lbc_br(1, 0);
Sergei Poselenov5d108ac2008-04-30 11:42:50 +0200119
120 /*
121 * Re-do flash protection upon new addresses
122 */
123 flash_protect (FLAG_PROTECT_CLEAR,
124 gd->bd->bi_flashstart, 0xffffffff,
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200125 &flash_info[CONFIG_SYS_MAX_FLASH_BANKS - 1]);
Sergei Poselenov5d108ac2008-04-30 11:42:50 +0200126
127 /* Monitor protection ON by default */
128 flash_protect (FLAG_PROTECT_SET,
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200129 CONFIG_SYS_MONITOR_BASE, CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
130 &flash_info[CONFIG_SYS_MAX_FLASH_BANKS - 1]);
Sergei Poselenov5d108ac2008-04-30 11:42:50 +0200131
132 /* Environment protection ON by default */
133 flash_protect (FLAG_PROTECT_SET,
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200134 CONFIG_ENV_ADDR,
135 CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200136 &flash_info[CONFIG_SYS_MAX_FLASH_BANKS - 1]);
Sergei Poselenov5d108ac2008-04-30 11:42:50 +0200137
138 /* Redundant environment protection ON by default */
139 flash_protect (FLAG_PROTECT_SET,
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200140 CONFIG_ENV_ADDR_REDUND,
Wolfgang Denkdfcd7f22009-05-15 00:16:03 +0200141 CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200142 &flash_info[CONFIG_SYS_MAX_FLASH_BANKS - 1]);
Sergei Poselenov5d108ac2008-04-30 11:42:50 +0200143 }
144
145 return 0;
146}
147
148/*
149 * Initialize Local Bus
150 */
151void local_bus_init (void)
152{
Becky Brucef51cdaf2010-06-17 11:37:20 -0500153 volatile fsl_lbc_t *lbc = LBC_BASE_ADDR;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200154 volatile ccsr_local_ecm_t *ecm = (void *)(CONFIG_SYS_MPC85xx_ECM_ADDR);
Detlev Zundel3e79b582008-08-15 15:42:12 +0200155 sys_info_t sysinfo;
156 uint clkdiv;
157 uint lbc_mhz;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200158 uint lcrr = CONFIG_SYS_LBC_LCRR;
Sergei Poselenov5d108ac2008-04-30 11:42:50 +0200159
Detlev Zundel3e79b582008-08-15 15:42:12 +0200160 get_sys_info (&sysinfo);
Trent Piephoa5d212a2008-12-03 15:16:34 -0800161 clkdiv = lbc->lcrr & LCRR_CLKDIV;
Detlev Zundel3e79b582008-08-15 15:42:12 +0200162 lbc_mhz = sysinfo.freqSystemBus / 1000000 / clkdiv;
Sergei Poselenov5d108ac2008-04-30 11:42:50 +0200163
Detlev Zundel3e79b582008-08-15 15:42:12 +0200164 /* Disable PLL bypass for Local Bus Clock >= 66 MHz */
165 if (lbc_mhz >= 66)
166 lcrr &= ~LCRR_DBYP; /* DLL Enabled */
167 else
168 lcrr |= LCRR_DBYP; /* DLL Bypass */
169
170 out_be32 (&lbc->lcrr, lcrr);
171 asm ("sync;isync;msync");
172
173 out_be32 (&lbc->ltesr, 0xffffffff); /* Clear LBC error interrupts */
174 out_be32 (&lbc->lteir, 0xffffffff); /* Enable LBC error interrupts */
175 out_be32 (&ecm->eedr, 0xffffffff); /* Clear ecm errors */
176 out_be32 (&ecm->eeer, 0xffffffff); /* Enable ecm errors */
177
178 /* Init UPMA for FPGA access */
179 out_be32 (&lbc->mamr, 0x44440); /* Use a customer-supplied value */
180 upmconfig (UPMA, (uint *)UPMTableA, sizeof(UPMTableA)/sizeof(int));
Anatolij Gustschine64987a2008-08-15 15:42:13 +0200181
u-boot@bugs.denx.defb661ea2008-09-11 15:40:01 +0200182 /* Init UPMB for Lime controller access */
183 out_be32 (&lbc->mbmr, 0x444440); /* Use a customer-supplied value */
184 upmconfig (UPMB, (uint *)UPMTableB, sizeof(UPMTableB)/sizeof(int));
Sergei Poselenov5d108ac2008-04-30 11:42:50 +0200185}
186
187#if defined(CONFIG_PCI)
188/*
189 * Initialize PCI Devices, report devices found.
190 */
191
192#ifndef CONFIG_PCI_PNP
193static struct pci_config_table pci_mpc85xxads_config_table[] = {
194 {PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
195 PCI_IDSEL_NUMBER, PCI_ANY_ID,
196 pci_cfgfunc_config_device, {PCI_ENET0_IOADDR,
197 PCI_ENET0_MEMADDR,
198 PCI_COMMAND_MEMORY |
199 PCI_COMMAND_MASTER}},
200 {}
201};
202#endif
203
204
205static struct pci_controller hose = {
206#ifndef CONFIG_PCI_PNP
207 config_table:pci_mpc85xxads_config_table,
208#endif
209};
210
211#endif /* CONFIG_PCI */
212
213
214void pci_init_board (void)
215{
216#ifdef CONFIG_PCI
217 pci_mpc85xx_init (&hose);
218#endif /* CONFIG_PCI */
219}
220
221#ifdef CONFIG_BOARD_EARLY_INIT_R
222int board_early_init_r (void)
223{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200224 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
Detlev Zundel3e79b582008-08-15 15:42:12 +0200225
226 /* set and reset the GPIO pin 2 which will reset the W83782G chip */
227 out_8((unsigned char*)&gur->gpoutdr, 0x3F );
228 out_be32((unsigned int*)&gur->gpiocr, 0x200 ); /* enable GPOut */
229 udelay(200);
230 out_8( (unsigned char*)&gur->gpoutdr, 0x1F );
231
Sergei Poselenov5d108ac2008-04-30 11:42:50 +0200232 return (0);
233}
234#endif /* CONFIG_BOARD_EARLY_INIT_R */
Sergei Poselenove18575d2008-05-07 15:10:49 +0200235
236#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
237void
238ft_board_setup(void *blob, bd_t *bd)
239{
Detlev Zundel3e79b582008-08-15 15:42:12 +0200240 u32 val[12];
241 int rc, i = 0;
Sergei Poselenove18575d2008-05-07 15:10:49 +0200242
243 ft_cpu_setup(blob, bd);
244
Detlev Zundel3e79b582008-08-15 15:42:12 +0200245 /* Fixup NOR FLASH mapping */
246 val[i++] = 0; /* chip select number */
247 val[i++] = 0; /* always 0 */
248 val[i++] = gd->bd->bi_flashstart;
249 val[i++] = gd->bd->bi_flashsize;
250
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200251 if (mb862xx.frameAdrs == CONFIG_SYS_LIME_BASE) {
Anatolij Gustschine64987a2008-08-15 15:42:13 +0200252 /* Fixup LIME mapping */
253 val[i++] = 2; /* chip select number */
254 val[i++] = 0; /* always 0 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200255 val[i++] = CONFIG_SYS_LIME_BASE;
256 val[i++] = CONFIG_SYS_LIME_SIZE;
Anatolij Gustschine64987a2008-08-15 15:42:13 +0200257 }
258
Detlev Zundel3e79b582008-08-15 15:42:12 +0200259 /* Fixup FPGA mapping */
260 val[i++] = 3; /* chip select number */
261 val[i++] = 0; /* always 0 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200262 val[i++] = CONFIG_SYS_FPGA_BASE;
263 val[i++] = CONFIG_SYS_FPGA_SIZE;
Sergei Poselenove18575d2008-05-07 15:10:49 +0200264
265 rc = fdt_find_and_setprop(blob, "/localbus", "ranges",
Detlev Zundel3e79b582008-08-15 15:42:12 +0200266 val, i * sizeof(u32), 1);
Sergei Poselenove18575d2008-05-07 15:10:49 +0200267 if (rc)
Detlev Zundel3e79b582008-08-15 15:42:12 +0200268 printf("Unable to update localbus ranges, err=%s\n",
Sergei Poselenove18575d2008-05-07 15:10:49 +0200269 fdt_strerror(rc));
270}
271#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */
Anatolij Gustschine64987a2008-08-15 15:42:13 +0200272
Anatolij Gustschine64987a2008-08-15 15:42:13 +0200273#define DEFAULT_BRIGHTNESS 25
274#define BACKLIGHT_ENABLE (1 << 31)
275
Anatolij Gustschine64987a2008-08-15 15:42:13 +0200276static const gdc_regs init_regs [] =
277{
278 {0x0100, 0x00010f00},
279 {0x0020, 0x801901df},
280 {0x0024, 0x00000000},
281 {0x0028, 0x00000000},
282 {0x002c, 0x00000000},
283 {0x0110, 0x00000000},
284 {0x0114, 0x00000000},
285 {0x0118, 0x01df0320},
286 {0x0004, 0x041f0000},
287 {0x0008, 0x031f031f},
288 {0x000c, 0x017f0349},
289 {0x0010, 0x020c0000},
290 {0x0014, 0x01df01e9},
291 {0x0018, 0x00000000},
292 {0x001c, 0x01e00320},
293 {0x0100, 0x80010f00},
294 {0x0, 0x0}
295};
296
297const gdc_regs *board_get_regs (void)
298{
299 return init_regs;
300}
301
u-boot@bugs.denx.defb661ea2008-09-11 15:40:01 +0200302int lime_probe(void)
303{
u-boot@bugs.denx.defb661ea2008-09-11 15:40:01 +0200304 uint cfg_br2;
305 uint cfg_or2;
Wolfgang Grandeggerc28d3bb2009-10-23 12:03:13 +0200306 int type;
u-boot@bugs.denx.defb661ea2008-09-11 15:40:01 +0200307
Becky Brucef51cdaf2010-06-17 11:37:20 -0500308 cfg_br2 = get_lbc_br(2);
309 cfg_or2 = get_lbc_or(2);
u-boot@bugs.denx.defb661ea2008-09-11 15:40:01 +0200310
311 /* Configure GPCM for CS2 */
Becky Brucef51cdaf2010-06-17 11:37:20 -0500312 set_lbc_br(2, 0);
313 set_lbc_or(2, 0xfc000410);
314 set_lbc_br(2, (CONFIG_SYS_LIME_BASE) | 0x00001901);
u-boot@bugs.denx.defb661ea2008-09-11 15:40:01 +0200315
Wolfgang Grandeggerc28d3bb2009-10-23 12:03:13 +0200316 /* Get controller type */
317 type = mb862xx_probe(CONFIG_SYS_LIME_BASE);
u-boot@bugs.denx.defb661ea2008-09-11 15:40:01 +0200318
319 /* Restore previous CS2 configuration */
Becky Brucef51cdaf2010-06-17 11:37:20 -0500320 set_lbc_br(2, 0);
321 set_lbc_or(2, cfg_or2);
322 set_lbc_br(2, cfg_br2);
Wolfgang Grandeggerc28d3bb2009-10-23 12:03:13 +0200323
324 return (type == MB862XX_TYPE_LIME) ? 1 : 0;
u-boot@bugs.denx.defb661ea2008-09-11 15:40:01 +0200325}
326
Anatolij Gustschine64987a2008-08-15 15:42:13 +0200327/* Returns Lime base address */
328unsigned int board_video_init (void)
329{
u-boot@bugs.denx.defb661ea2008-09-11 15:40:01 +0200330 if (!lime_probe())
Anatolij Gustschine64987a2008-08-15 15:42:13 +0200331 return 0;
332
Wolfgang Grandeggerc28d3bb2009-10-23 12:03:13 +0200333 mb862xx.winSizeX = 800;
334 mb862xx.winSizeY = 480;
Anatolij Gustschine64987a2008-08-15 15:42:13 +0200335 mb862xx.gdfIndex = GDF_15BIT_555RGB;
336 mb862xx.gdfBytesPP = 2;
337
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200338 return CONFIG_SYS_LIME_BASE;
Anatolij Gustschine64987a2008-08-15 15:42:13 +0200339}
340
341#define W83782D_REG_CFG 0x40
342#define W83782D_REG_BANK_SEL 0x4e
343#define W83782D_REG_ADCCLK 0x4b
344#define W83782D_REG_BEEP_CTRL 0x4d
345#define W83782D_REG_BEEP_CTRL2 0x57
346#define W83782D_REG_PWMOUT1 0x5b
347#define W83782D_REG_VBAT 0x5d
348
349static int w83782d_hwmon_init(void)
350{
351 u8 buf;
352
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200353 if (i2c_read(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_CFG, 1, &buf, 1))
Anatolij Gustschine64987a2008-08-15 15:42:13 +0200354 return -1;
355
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200356 i2c_reg_write(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_CFG, 0x80);
357 i2c_reg_write(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_BANK_SEL, 0);
358 i2c_reg_write(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_ADCCLK, 0x40);
Anatolij Gustschine64987a2008-08-15 15:42:13 +0200359
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200360 buf = i2c_reg_read(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_BEEP_CTRL);
361 i2c_reg_write(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_BEEP_CTRL,
Anatolij Gustschine64987a2008-08-15 15:42:13 +0200362 buf | 0x80);
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200363 i2c_reg_write(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_BEEP_CTRL2, 0);
364 i2c_reg_write(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_PWMOUT1, 0x47);
365 i2c_reg_write(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_VBAT, 0x01);
Anatolij Gustschine64987a2008-08-15 15:42:13 +0200366
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200367 buf = i2c_reg_read(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_CFG);
368 i2c_reg_write(CONFIG_SYS_I2C_W83782G_ADDR, W83782D_REG_CFG,
Anatolij Gustschine64987a2008-08-15 15:42:13 +0200369 (buf & 0xf4) | 0x01);
370 return 0;
371}
372
373static void board_backlight_brightness(int br)
374{
375 u32 reg;
376 u8 buf;
377 u8 old_buf;
378
379 /* Select bank 0 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200380 if (i2c_read(CONFIG_SYS_I2C_W83782G_ADDR, 0x4e, 1, &old_buf, 1))
Anatolij Gustschine64987a2008-08-15 15:42:13 +0200381 goto err;
382 else
383 buf = old_buf & 0xf8;
384
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200385 if (i2c_write(CONFIG_SYS_I2C_W83782G_ADDR, 0x4e, 1, &buf, 1))
Anatolij Gustschine64987a2008-08-15 15:42:13 +0200386 goto err;
387
388 if (br > 0) {
389 /* PWMOUT1 duty cycle ctrl */
390 buf = 255 / (100 / br);
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200391 if (i2c_write(CONFIG_SYS_I2C_W83782G_ADDR, 0x5b, 1, &buf, 1))
Anatolij Gustschine64987a2008-08-15 15:42:13 +0200392 goto err;
393
394 /* LEDs on */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200395 reg = in_be32((void *)(CONFIG_SYS_FPGA_BASE + 0x0c));
Anatolij Gustschine64987a2008-08-15 15:42:13 +0200396 if (!(reg & BACKLIGHT_ENABLE));
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200397 out_be32((void *)(CONFIG_SYS_FPGA_BASE + 0x0c),
Anatolij Gustschine64987a2008-08-15 15:42:13 +0200398 reg | BACKLIGHT_ENABLE);
399 } else {
400 buf = 0;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200401 if (i2c_write(CONFIG_SYS_I2C_W83782G_ADDR, 0x5b, 1, &buf, 1))
Anatolij Gustschine64987a2008-08-15 15:42:13 +0200402 goto err;
403
404 /* LEDs off */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200405 reg = in_be32((void *)(CONFIG_SYS_FPGA_BASE + 0x0c));
Anatolij Gustschine64987a2008-08-15 15:42:13 +0200406 reg &= ~BACKLIGHT_ENABLE;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200407 out_be32((void *)(CONFIG_SYS_FPGA_BASE + 0x0c), reg);
Anatolij Gustschine64987a2008-08-15 15:42:13 +0200408 }
409 /* Restore previous bank setting */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200410 if (i2c_write(CONFIG_SYS_I2C_W83782G_ADDR, 0x4e, 1, &old_buf, 1))
Anatolij Gustschine64987a2008-08-15 15:42:13 +0200411 goto err;
412
413 return;
414err:
415 printf("W83782G I2C access failed\n");
416}
417
418void board_backlight_switch (int flag)
419{
420 char * param;
421 int rc;
422
423 if (w83782d_hwmon_init())
424 printf ("hwmon IC init failed\n");
425
426 if (flag) {
427 param = getenv("brightness");
428 rc = param ? simple_strtol(param, NULL, 10) : -1;
429 if (rc < 0)
430 rc = DEFAULT_BRIGHTNESS;
431 } else {
432 rc = 0;
433 }
434 board_backlight_brightness(rc);
435}
436
437#if defined(CONFIG_CONSOLE_EXTRA_INFO)
438/*
439 * Return text to be printed besides the logo.
440 */
441void video_get_info_str (int line_number, char *info)
442{
443 if (line_number == 1) {
444 strcpy (info, " Board: Socrates");
445 } else {
446 info [0] = '\0';
447 }
448}
449#endif