| Meenakshi Aggarwal | 9ed303d | 2020-12-04 20:17:28 +0530 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ OR X11 |
| 2 | /* |
| 3 | * NXP LX2162AQDS device tree source for the SERDES block #1 - protocol 20 |
| 4 | * |
| 5 | * Some assumptions are made: |
| 6 | * * Mezzanine card M8 is connected to IO SLOT1 |
| 7 | * (xlaui4 for DPMAC 1) |
| 8 | * |
| 9 | * Copyright 2020 NXP |
| 10 | * |
| 11 | */ |
| 12 | |
| 13 | #include "fsl-lx2160a-qds.dtsi" |
| 14 | |
| 15 | &dpmac1 { |
| 16 | status = "okay"; |
| 17 | phy-handle = <&cortina_phy1_0>; |
| 18 | phy-connection-type = "xlaui4"; |
| 19 | }; |
| 20 | |
| 21 | &emdio1_slot1 { |
| 22 | cortina_phy1_0: ethernet-phy@0 { |
| 23 | compatible = "ethernet-phy-ieee802.3-c45"; |
| 24 | reg = <0x0>; |
| 25 | }; |
| 26 | }; |