blob: 15bcb4ba91399894b8c934b584d9ae76c083eafc [file] [log] [blame]
Bhupesh Sharmaa6238012023-08-14 11:27:42 +05301/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Copyright (c) 2023, Linaro Limited
4 */
5
6#ifndef QCOM_PHY_QMP_QSERDES_TXRX_UFS_V6_H_
7#define QCOM_PHY_QMP_QSERDES_TXRX_UFS_V6_H_
8
9#define QSERDES_UFS_V6_TX_RES_CODE_LANE_TX 0x28
10#define QSERDES_UFS_V6_TX_RES_CODE_LANE_RX 0x2c
11#define QSERDES_UFS_V6_TX_RES_CODE_LANE_OFFSET_TX 0x30
12#define QSERDES_UFS_V6_TX_RES_CODE_LANE_OFFSET_RX 0x34
13
14#define QSERDES_UFS_V6_RX_UCDR_FASTLOCK_FO_GAIN_RATE2 0x08
15#define QSERDES_UFS_V6_RX_UCDR_FASTLOCK_FO_GAIN_RATE4 0x10
16#define QSERDES_UFS_V6_RX_VGA_CAL_MAN_VAL 0x178
17#define QSERDES_UFS_V6_RX_MODE_RATE_0_1_B0 0x208
18#define QSERDES_UFS_V6_RX_MODE_RATE_0_1_B1 0x20c
19#define QSERDES_UFS_V6_RX_MODE_RATE_0_1_B3 0x214
20#define QSERDES_UFS_V6_RX_MODE_RATE_0_1_B6 0x220
21#define QSERDES_UFS_V6_RX_MODE_RATE2_B3 0x238
22#define QSERDES_UFS_V6_RX_MODE_RATE2_B6 0x244
23#define QSERDES_UFS_V6_RX_MODE_RATE3_B3 0x25c
24#define QSERDES_UFS_V6_RX_MODE_RATE3_B4 0x260
25#define QSERDES_UFS_V6_RX_MODE_RATE3_B5 0x264
26#define QSERDES_UFS_V6_RX_MODE_RATE3_B8 0x270
27#define QSERDES_UFS_V6_RX_MODE_RATE4_B3 0x280
28#define QSERDES_UFS_V6_RX_MODE_RATE4_B6 0x28c
29
30#endif