Marek Vasut | f54eb0b | 2023-02-28 07:28:57 +0100 | [diff] [blame] | 1 | if RCAR_GEN3 |
| 2 | |
| 3 | menu "Select Target SoC" |
| 4 | |
| 5 | config R8A774A1 |
| 6 | bool "Renesas SoC R8A774A1" |
| 7 | select GICV2 |
| 8 | imply CLK_R8A774A1 |
| 9 | imply PINCTRL_PFC_R8A774A1 |
| 10 | |
| 11 | config R8A774B1 |
| 12 | bool "Renesas SoC R8A774B1" |
| 13 | select GICV2 |
| 14 | imply CLK_R8A774B1 |
| 15 | imply PINCTRL_PFC_R8A774B1 |
| 16 | |
| 17 | config R8A774C0 |
| 18 | bool "Renesas SoC R8A774C0" |
| 19 | select GICV2 |
| 20 | imply CLK_R8A774C0 |
| 21 | imply PINCTRL_PFC_R8A774C0 |
| 22 | |
| 23 | config R8A774E1 |
| 24 | bool "Renesas SoC R8A774E1" |
| 25 | select GICV2 |
| 26 | imply CLK_R8A774E1 |
| 27 | imply PINCTRL_PFC_R8A774E1 |
| 28 | |
| 29 | config R8A7795 |
| 30 | bool "Renesas SoC R8A7795" |
| 31 | select GICV2 |
| 32 | imply CLK_R8A7795 |
| 33 | imply PINCTRL_PFC_R8A77951 |
| 34 | |
| 35 | config R8A7796 |
| 36 | bool "Renesas SoC R8A7796" |
| 37 | select GICV2 |
| 38 | imply CLK_R8A77960 |
| 39 | imply CLK_R8A77961 |
| 40 | imply PINCTRL_PFC_R8A77960 |
| 41 | imply PINCTRL_PFC_R8A77961 |
| 42 | |
| 43 | config R8A77965 |
| 44 | bool "Renesas SoC R8A77965" |
| 45 | select GICV2 |
| 46 | imply CLK_R8A77965 |
| 47 | imply PINCTRL_PFC_R8A77965 |
| 48 | |
| 49 | config R8A77970 |
| 50 | bool "Renesas SoC R8A77970" |
| 51 | select GICV2 |
| 52 | imply CLK_R8A77970 |
| 53 | imply PINCTRL_PFC_R8A77970 |
| 54 | |
| 55 | config R8A77980 |
| 56 | bool "Renesas SoC R8A77980" |
| 57 | select GICV2 |
| 58 | imply CLK_R8A77980 |
| 59 | imply PINCTRL_PFC_R8A77980 |
| 60 | |
| 61 | config R8A77990 |
| 62 | bool "Renesas SoC R8A77990" |
| 63 | select GICV2 |
| 64 | imply CLK_R8A77990 |
| 65 | imply PINCTRL_PFC_R8A77990 |
| 66 | |
| 67 | config R8A77995 |
| 68 | bool "Renesas SoC R8A77995" |
| 69 | select GICV2 |
| 70 | imply CLK_R8A77995 |
| 71 | imply PINCTRL_PFC_R8A77995 |
| 72 | |
Marek Vasut | f54eb0b | 2023-02-28 07:28:57 +0100 | [diff] [blame] | 73 | config RZ_G2 |
| 74 | bool "Renesas ARM SoCs RZ/G2 (64bit)" |
| 75 | |
| 76 | endmenu |
| 77 | |
| 78 | choice |
| 79 | prompt "Renesas ARM64 SoCs board select" |
| 80 | optional |
| 81 | |
| 82 | config TARGET_BEACON_RZG2M |
| 83 | bool "Beacon EmbeddedWorks RZ/G2 Dev Kit" |
| 84 | select PINCTRL_PFC_R8A774A1 |
| 85 | select PINCTRL_PFC_R8A774B1 |
| 86 | select PINCTRL_PFC_R8A774E1 |
| 87 | select R8A774A1 |
| 88 | select R8A774B1 |
| 89 | select R8A774E1 |
| 90 | select RZ_G2 |
| 91 | imply CLK_CCF |
| 92 | imply CLK_VERSACLOCK |
| 93 | imply MULTI_DTB_FIT |
| 94 | imply MULTI_DTB_FIT_USER_DEFINED_AREA |
| 95 | |
| 96 | config TARGET_CONDOR |
| 97 | bool "Condor board" |
| 98 | imply R8A77980 |
| 99 | help |
| 100 | Support for Renesas R-Car Gen3 Condor platform |
| 101 | |
Valentine Barshak | ed2f65f | 2019-04-23 23:44:57 +0300 | [diff] [blame] | 102 | config TARGET_V3HSK |
| 103 | bool "V3HSK board" |
| 104 | help |
| 105 | Support for Renesas R-Car Gen3 V3HSK platform |
| 106 | |
Marek Vasut | f54eb0b | 2023-02-28 07:28:57 +0100 | [diff] [blame] | 107 | config TARGET_DRAAK |
| 108 | bool "Draak board" |
| 109 | imply R8A77995 |
| 110 | help |
| 111 | Support for Renesas R-Car Gen3 Draak platform |
| 112 | |
| 113 | config TARGET_EAGLE |
| 114 | bool "Eagle board" |
| 115 | imply R8A77970 |
| 116 | help |
| 117 | Support for Renesas R-Car Gen3 Eagle platform |
| 118 | |
Valentine Barshak | 5f4e269 | 2019-04-23 23:44:57 +0300 | [diff] [blame] | 119 | config TARGET_V3MSK |
| 120 | bool "V3MSK board" |
| 121 | help |
| 122 | Support for Renesas R-Car Gen3 V3MSK platform |
| 123 | |
Marek Vasut | f54eb0b | 2023-02-28 07:28:57 +0100 | [diff] [blame] | 124 | config TARGET_EBISU |
| 125 | bool "Ebisu board" |
| 126 | imply R8A77990 |
| 127 | help |
| 128 | Support for Renesas R-Car Gen3 Ebisu platform |
| 129 | |
Marek Vasut | f54eb0b | 2023-02-28 07:28:57 +0100 | [diff] [blame] | 130 | config TARGET_HIHOPE_RZG2 |
| 131 | bool "HiHope RZ/G2 board" |
| 132 | imply MULTI_DTB_FIT |
| 133 | imply MULTI_DTB_FIT_USER_DEFINED_AREA |
| 134 | imply R8A774A1 |
| 135 | imply R8A774B1 |
| 136 | imply R8A774E1 |
| 137 | imply RZ_G2 |
| 138 | imply SYS_MALLOC_F |
| 139 | help |
| 140 | Support for RZG2 HiHope platform |
| 141 | |
| 142 | config TARGET_SILINUX_EK874 |
| 143 | bool "Silicon Linux EK874 board" |
| 144 | imply R8A774C0 |
| 145 | imply RZ_G2 |
| 146 | help |
| 147 | Support for Silicon Linux EK874 platform |
| 148 | |
| 149 | config TARGET_SALVATOR_X |
| 150 | bool "Salvator-X board" |
| 151 | imply MULTI_DTB_FIT |
| 152 | imply MULTI_DTB_FIT_USER_DEFINED_AREA |
| 153 | imply R8A7795 |
| 154 | imply R8A7796 |
| 155 | imply R8A77965 |
| 156 | imply SYS_MALLOC_F |
| 157 | help |
| 158 | Support for Renesas R-Car Gen3 platform |
| 159 | |
| 160 | config TARGET_ULCB |
| 161 | bool "ULCB board" |
| 162 | imply MULTI_DTB_FIT |
| 163 | imply MULTI_DTB_FIT_USER_DEFINED_AREA |
| 164 | imply R8A7795 |
| 165 | imply R8A7796 |
| 166 | imply R8A77965 |
| 167 | imply SYS_MALLOC_F |
| 168 | help |
| 169 | Support for Renesas R-Car Gen3 ULCB platform |
| 170 | |
| 171 | endchoice |
| 172 | |
| 173 | source "board/renesas/condor/Kconfig" |
| 174 | source "board/renesas/draak/Kconfig" |
| 175 | source "board/renesas/eagle/Kconfig" |
| 176 | source "board/renesas/ebisu/Kconfig" |
Marek Vasut | f54eb0b | 2023-02-28 07:28:57 +0100 | [diff] [blame] | 177 | source "board/renesas/salvator-x/Kconfig" |
| 178 | source "board/renesas/ulcb/Kconfig" |
Valentine Barshak | ed2f65f | 2019-04-23 23:44:57 +0300 | [diff] [blame] | 179 | source "board/renesas/v3hsk/Kconfig" |
Valentine Barshak | 5f4e269 | 2019-04-23 23:44:57 +0300 | [diff] [blame] | 180 | source "board/renesas/v3msk/Kconfig" |
Marek Vasut | f54eb0b | 2023-02-28 07:28:57 +0100 | [diff] [blame] | 181 | source "board/beacon/beacon-rzg2m/Kconfig" |
| 182 | source "board/hoperun/hihope-rzg2/Kconfig" |
| 183 | source "board/silinux/ek874/Kconfig" |
| 184 | |
| 185 | config MULTI_DTB_FIT_UNCOMPRESS_SZ |
| 186 | default 0x80000 if TARGET_BEACON_RZG2M |
| 187 | default 0x80000 if TARGET_HIHOPE_RZG2 |
| 188 | default 0x80000 if TARGET_SALVATOR_X |
| 189 | default 0x80000 if TARGET_ULCB |
| 190 | |
| 191 | config MULTI_DTB_FIT_USER_DEF_ADDR |
| 192 | default 0x49000000 if TARGET_BEACON_RZG2M |
| 193 | default 0x49000000 if TARGET_HIHOPE_RZG2 |
| 194 | default 0x49000000 if TARGET_SALVATOR_X |
| 195 | default 0x49000000 if TARGET_ULCB |
| 196 | |
| 197 | config DM_RESET |
| 198 | default y if RCAR_GEN3 |
| 199 | |
| 200 | endif |