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Wolfgang Denk74f43042005-09-25 01:48:28 +02001/*
2 * armboot - Startup Code for ARM926EJS CPU-core
3 *
4 * Copyright (c) 2003 Texas Instruments
5 *
6 * ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
7 *
8 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
9 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
10 * Copyright (c) 2002 Gary Jennejohn <gj@denx.de>
11 * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
12 * Copyright (c) 2003 Kshitij <kshitij@ti.com>
13 *
14 * See file CREDITS for list of people who contributed to this
15 * project.
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 * MA 02111-1307 USA
31 */
32
33
34#include <config.h>
35#include <version.h>
36
37/*
38 *************************************************************************
39 *
40 * Jump vector table
41 *
42 *************************************************************************
43 */
44
45.globl _start
46_start:
47 b reset
48 ldr pc, _undefined_instruction
49 ldr pc, _software_interrupt
50 ldr pc, _prefetch_abort
51 ldr pc, _data_abort
52 ldr pc, _not_used
53 ldr pc, _irq
54 ldr pc, _fiq
55
56_undefined_instruction:
57 .word undefined_instruction
58_software_interrupt:
59 .word software_interrupt
60_prefetch_abort:
61 .word prefetch_abort
62_data_abort:
63 .word data_abort
64_not_used:
65 .word not_used
66_irq:
67 .word irq
68_fiq:
69 .word fiq
70
71 .balignl 16,0xdeadbeef
72
73/*
74 *************************************************************************
75 *
76 * Startup Code (reset vector)
77 *
78 * do important init only if we don't start from memory!
79 * setup memory and board specific bits prior to relocation.
80 * relocate armboot to ram
81 * setup stack
82 *
83 *************************************************************************
84 */
85
86_TEXT_BASE:
87 .word TEXT_BASE /* address of _start in the linked image */
88
89.globl _armboot_start
90_armboot_start:
91 .word _start
92
93/*
94 * These are defined in the board-specific linker script.
95 */
96.globl _bss_start
97_bss_start:
98 .word __bss_start
99
100.globl _bss_end
101_bss_end:
102 .word _end
103
104#ifdef CONFIG_USE_IRQ
105/* IRQ stack memory (calculated at run-time) */
106.globl IRQ_STACK_START
107IRQ_STACK_START:
108 .word 0x0badc0de
109
110/* IRQ stack memory (calculated at run-time) */
111.globl FIQ_STACK_START
112FIQ_STACK_START:
113 .word 0x0badc0de
114#endif
115
116
117/*
118 * the actual reset code
119 */
120.globl reset
121reset:
122 /*
123 * set the cpu to SVC32 mode
124 */
125 mrs r0,cpsr
126 bic r0,r0,#0x1f
127 orr r0,r0,#0xd3
128 msr cpsr,r0
129
130 /*
131 * we do sys-critical inits only at reboot,
132 * not when booting from ram!
133 */
134#ifdef CONFIG_INIT_CRITICAL
135 bl cpu_init_crit
136#endif
137
138relocate: /* relocate U-Boot to RAM */
139 adr r0, _start /* pc relative address of label */
140 ldr r1, _TEXT_BASE /* linked image address of label */
141 cmp r0, r1 /* test if we run from flash or RAM */
142 beq stack_setup /* ifeq we are in the RAM copy */
143
144 ldr r2, _armboot_start
145 ldr r3, _bss_start
146 sub r2, r3, r2 /* r2 <- size of armboot */
147 add r2, r0, r2 /* r2 <- source end address */
148
149copy_loop:
150 ldmia r0!, {r3-r10} /* copy from source address [r0] */
151 stmia r1!, {r3-r10} /* copy to target address [r1] */
152 cmp r0, r2 /* until source end addreee [r2] */
153 ble copy_loop
154
155 /* Set up the stack */
156stack_setup:
157 ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
158 sub r0, r0, #CFG_MALLOC_LEN /* malloc area */
159 sub r0, r0, #CFG_GBL_DATA_SIZE /* bdinfo */
160#ifdef CONFIG_USE_IRQ
161 sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
162#endif
163 sub sp, r0, #12 /* leave 3 words for abort-stack */
164
165clear_bss:
166 ldr r0, _bss_start /* find start of bss segment */
167 ldr r1, _bss_end /* stop here */
168 mov r2, #0x00000000 /* clear */
169
170clbss_l:str r2, [r0] /* clear loop... */
171 add r0, r0, #4
172 cmp r0, r1
173 ble clbss_l
174
175 ldr pc, _start_armboot
176
177_start_armboot:
178 .word start_armboot
179
180/*
181 *************************************************************************
182 *
183 * CPU_init_critical registers
184 *
185 * setup important registers
186 * setup memory timing
187 *
188 *************************************************************************
189 */
190
191cpu_init_crit:
192 /* arm_int_generic assumes the ARM boot monitor, or user software,
193 * has initialized the platform
194 */
195 mov pc, lr /* back to my caller */
196/*
197 *************************************************************************
198 *
199 * Interrupt handling
200 *
201 *************************************************************************
202 */
203
204@
205@ IRQ stack frame.
206@
207#define S_FRAME_SIZE 72
208
209#define S_OLD_R0 68
210#define S_PSR 64
211#define S_PC 60
212#define S_LR 56
213#define S_SP 52
214
215#define S_IP 48
216#define S_FP 44
217#define S_R10 40
218#define S_R9 36
219#define S_R8 32
220#define S_R7 28
221#define S_R6 24
222#define S_R5 20
223#define S_R4 16
224#define S_R3 12
225#define S_R2 8
226#define S_R1 4
227#define S_R0 0
228
229#define MODE_SVC 0x13
230#define I_BIT 0x80
231
232/*
233 * use bad_save_user_regs for abort/prefetch/undef/swi ...
234 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
235 */
236
237 .macro bad_save_user_regs
238 @ carve out a frame on current user stack
239 sub sp, sp, #S_FRAME_SIZE
240 stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
241
242 ldr r2, _armboot_start
243 sub r2, r2, #(CONFIG_STACKSIZE+CFG_MALLOC_LEN)
244 sub r2, r2, #(CFG_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
245 @ get values for "aborted" pc and cpsr (into parm regs)
246 ldmia r2, {r2 - r3}
247 add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
248 add r5, sp, #S_SP
249 mov r1, lr
250 stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
251 mov r0, sp @ save current stack into r0 (param register)
252 .endm
253
254 .macro irq_save_user_regs
255 sub sp, sp, #S_FRAME_SIZE
256 stmia sp, {r0 - r12} @ Calling r0-r12
257 @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
258 add r8, sp, #S_PC
259 stmdb r8, {sp, lr}^ @ Calling SP, LR
260 str lr, [r8, #0] @ Save calling PC
261 mrs r6, spsr
262 str r6, [r8, #4] @ Save CPSR
263 str r0, [r8, #8] @ Save OLD_R0
264 mov r0, sp
265 .endm
266
267 .macro irq_restore_user_regs
268 ldmia sp, {r0 - lr}^ @ Calling r0 - lr
269 mov r0, r0
270 ldr lr, [sp, #S_PC] @ Get PC
271 add sp, sp, #S_FRAME_SIZE
272 subs pc, lr, #4 @ return & move spsr_svc into cpsr
273 .endm
274
275 .macro get_bad_stack
276 ldr r13, _armboot_start @ setup our mode stack
277 sub r13, r13, #(CONFIG_STACKSIZE+CFG_MALLOC_LEN)
278 sub r13, r13, #(CFG_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
279
280 str lr, [r13] @ save caller lr in position 0 of saved stack
281 mrs lr, spsr @ get the spsr
282 str lr, [r13, #4] @ save spsr in position 1 of saved stack
283 mov r13, #MODE_SVC @ prepare SVC-Mode
284 @ msr spsr_c, r13
285 msr spsr, r13 @ switch modes, make sure moves will execute
286 mov lr, pc @ capture return pc
287 movs pc, lr @ jump to next instruction & switch modes.
288 .endm
289
290 .macro get_irq_stack @ setup IRQ stack
291 ldr sp, IRQ_STACK_START
292 .endm
293
294 .macro get_fiq_stack @ setup FIQ stack
295 ldr sp, FIQ_STACK_START
296 .endm
297
298/*
299 * exception handlers
300 */
301 .align 5
302.globl undefined_instruction
303undefined_instruction:
304 get_bad_stack
305 bad_save_user_regs
306 bl do_undefined_instruction
307
308 .align 5
309.globl software_interrupt
310software_interrupt:
311 get_bad_stack
312 bad_save_user_regs
313 bl do_software_interrupt
314
315 .align 5
316.globl prefetch_abort
317prefetch_abort:
318 get_bad_stack
319 bad_save_user_regs
320 bl do_prefetch_abort
321
322 .align 5
323.globl data_abort
324data_abort:
325 get_bad_stack
326 bad_save_user_regs
327 bl do_data_abort
328
329 .align 5
330.globl not_used
331not_used:
332 get_bad_stack
333 bad_save_user_regs
334 bl do_not_used
335
336#ifdef CONFIG_USE_IRQ
337 .align 5
338.globl irq
339irq:
340 get_irq_stack
341 irq_save_user_regs
342 bl do_irq
343 irq_restore_user_regs
344
345 .align 5
346.globl fiq
347fiq:
348 get_fiq_stack
349 /* someone ought to write a more effiction fiq_save_user_regs */
350 irq_save_user_regs
351 bl do_fiq
352 irq_restore_user_regs
353
354#else
355
356 .align 5
Wolfgang Denkfe7eb5d2005-09-25 02:00:47 +0200357.globl irq
Wolfgang Denk74f43042005-09-25 01:48:28 +0200358irq:
359 get_bad_stack
360 bad_save_user_regs
361 bl do_irq
362
363 .align 5
Wolfgang Denkfe7eb5d2005-09-25 02:00:47 +0200364.globl fiq
Wolfgang Denk74f43042005-09-25 01:48:28 +0200365fiq:
366 get_bad_stack
367 bad_save_user_regs
368 bl do_fiq
369
370#endif