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Dinh Nguyen84b124d2019-04-23 16:55:03 -05001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2019 Intel Corporation <www.intel.com>
4 */
5
6#ifndef __CACHE_H
7#define __CACHE_H
8
Simon Glass401d1c42020-10-30 21:38:53 -06009struct udevice;
10
Dinh Nguyen84b124d2019-04-23 16:55:03 -050011/*
12 * Structure for the cache controller
13 */
14struct cache_info {
15 phys_addr_t base; /* Base physical address of cache device. */
16};
17
18struct cache_ops {
19 /**
20 * get_info() - Get basic cache info
21 *
22 * @dev: Device to check (UCLASS_CACHE)
23 * @info: Place to put info
24 * @return 0 if OK, -ve on error
25 */
26 int (*get_info)(struct udevice *dev, struct cache_info *info);
Rick Chen4d0140e2019-08-28 18:46:04 +080027
28 /**
29 * enable() - Enable cache
30 *
31 * @dev: Device to check (UCLASS_CACHE)
32 * @return 0 if OK, -ve on error
33 */
34 int (*enable)(struct udevice *dev);
35
36 /**
37 * disable() - Flush and disable cache
38 *
39 * @dev: Device to check (UCLASS_CACHE)
40 * @return 0 if OK, -ve on error
41 */
42 int (*disable)(struct udevice *dev);
Dinh Nguyen84b124d2019-04-23 16:55:03 -050043};
44
45#define cache_get_ops(dev) ((struct cache_ops *)(dev)->driver->ops)
46
47/**
48 * cache_get_info() - Get information about a cache controller
49 *
50 * @dev: Device to check (UCLASS_CACHE)
51 * @info: Returns cache info
52 * @return 0 if OK, -ve on error
53 */
54int cache_get_info(struct udevice *dev, struct cache_info *info);
55
Rick Chen4d0140e2019-08-28 18:46:04 +080056/**
57 * cache_enable() - Enable cache
58 *
59 * @dev: Device to check (UCLASS_CACHE)
60 * @return 0 if OK, -ve on error
61 */
62int cache_enable(struct udevice *dev);
63
64/**
65 * cache_disable() - Flush and disable cache
66 *
67 * @dev: Device to check (UCLASS_CACHE)
68 * @return 0 if OK, -ve on error
69 */
70int cache_disable(struct udevice *dev);
Dinh Nguyen84b124d2019-04-23 16:55:03 -050071#endif