blob: 72cdc31d870eb700d315701dc3f71387a741b1a9 [file] [log] [blame]
Stephen Warrenefad6cf2012-08-05 16:07:21 +00001/*
2 * (C) Copyright 2012 Stephen Warren
3 *
4 * See file CREDITS for list of people who contributed to this
5 * project.
6 *
Tom Rini5b8031c2016-01-14 22:05:13 -05007 * SPDX-License-Identifier: GPL-2.0
Stephen Warrenefad6cf2012-08-05 16:07:21 +00008 */
9
10#include <common.h>
11#include <asm/io.h>
12#include <asm/arch/wdog.h>
13
14#define RESET_TIMEOUT 10
15
16void reset_cpu(ulong addr)
17{
18 struct bcm2835_wdog_regs *regs =
19 (struct bcm2835_wdog_regs *)BCM2835_WDOG_PHYSADDR;
20 uint32_t rstc;
21
22 rstc = readl(&regs->rstc);
23 rstc &= ~BCM2835_WDOG_RSTC_WRCFG_MASK;
24 rstc |= BCM2835_WDOG_RSTC_WRCFG_FULL_RESET;
25
26 writel(BCM2835_WDOG_PASSWORD | RESET_TIMEOUT, &regs->wdog);
27 writel(BCM2835_WDOG_PASSWORD | rstc, &regs->rstc);
28}