Shaohui Xie | fdc2b54 | 2016-10-28 14:24:02 +0800 | [diff] [blame] | 1 | CONFIG_ARM=y |
| 2 | CONFIG_TARGET_LS1046AQDS=y |
Tom Rini | 278b90c | 2018-02-03 12:10:38 -0500 | [diff] [blame] | 3 | CONFIG_SYS_TEXT_BASE=0x60100000 |
Tom Rini | 2681e78 | 2017-05-01 11:41:11 -0400 | [diff] [blame] | 4 | CONFIG_FSL_LS_PPA=y |
Tom Rini | fa2c146 | 2018-02-10 16:54:38 -0500 | [diff] [blame] | 5 | CONFIG_DISTRO_DEFAULTS=y |
Tom Rini | 86cf1c8 | 2018-08-16 08:16:24 -0400 | [diff] [blame] | 6 | CONFIG_NR_DRAM_BANKS=2 |
Shaohui Xie | fdc2b54 | 2016-10-28 14:24:02 +0800 | [diff] [blame] | 7 | CONFIG_FIT_VERBOSE=y |
| 8 | CONFIG_OF_BOARD_SETUP=y |
| 9 | CONFIG_SYS_EXTRA_OPTIONS="LPUART" |
| 10 | CONFIG_BOOTDELAY=10 |
Sam Protsenko | 5abc1a4 | 2017-08-14 20:22:17 +0300 | [diff] [blame] | 11 | CONFIG_USE_BOOTARGS=y |
| 12 | CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)" |
Tom Rini | fa2c146 | 2018-02-10 16:54:38 -0500 | [diff] [blame] | 13 | # CONFIG_USE_BOOTCOMMAND is not set |
Adam Ford | 8ccf98b | 2018-07-29 13:13:29 -0500 | [diff] [blame] | 14 | CONFIG_MISC_INIT_R=y |
Shaohui Xie | fdc2b54 | 2016-10-28 14:24:02 +0800 | [diff] [blame] | 15 | CONFIG_CMD_BOOTZ=y |
Tuomas Tynkkynen | ad12dc1 | 2017-10-08 21:48:01 +0300 | [diff] [blame] | 16 | CONFIG_CMD_IMLS=y |
Shaohui Xie | fdc2b54 | 2016-10-28 14:24:02 +0800 | [diff] [blame] | 17 | CONFIG_CMD_GREPENV=y |
Shaohui Xie | fdc2b54 | 2016-10-28 14:24:02 +0800 | [diff] [blame] | 18 | CONFIG_CMD_MEMINFO=y |
Tom Rini | 8866312 | 2017-08-14 19:58:53 -0400 | [diff] [blame] | 19 | CONFIG_CMD_MEMTEST=y |
Patrick Delaunay | b331cd6 | 2017-01-27 11:00:42 +0100 | [diff] [blame] | 20 | CONFIG_CMD_GPT=y |
Tom Rini | 8866312 | 2017-08-14 19:58:53 -0400 | [diff] [blame] | 21 | CONFIG_CMD_I2C=y |
Shaohui Xie | fdc2b54 | 2016-10-28 14:24:02 +0800 | [diff] [blame] | 22 | CONFIG_CMD_MMC=y |
Tom Rini | 8f1a80e | 2017-07-28 21:31:42 -0400 | [diff] [blame] | 23 | CONFIG_CMD_NAND=y |
Hou Zhiqiang | 31cbcb5 | 2018-02-05 13:46:47 +0800 | [diff] [blame] | 24 | CONFIG_CMD_PCI=y |
Shaohui Xie | fdc2b54 | 2016-10-28 14:24:02 +0800 | [diff] [blame] | 25 | CONFIG_CMD_SF=y |
Tom Rini | 877a1a3 | 2017-08-11 11:20:19 -0400 | [diff] [blame] | 26 | CONFIG_CMD_USB=y |
Shaohui Xie | fdc2b54 | 2016-10-28 14:24:02 +0800 | [diff] [blame] | 27 | CONFIG_CMD_CACHE=y |
Siva Durga Prasad Paladugu | 0fd2290c | 2018-06-19 12:24:23 +0200 | [diff] [blame] | 28 | CONFIG_MP=y |
Tom Rini | 43ede0b | 2017-10-22 17:55:07 -0400 | [diff] [blame] | 29 | CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)" |
Shaohui Xie | fdc2b54 | 2016-10-28 14:24:02 +0800 | [diff] [blame] | 30 | CONFIG_OF_CONTROL=y |
Tom Rini | 8c5cad0 | 2018-09-03 15:26:12 -0400 | [diff] [blame] | 31 | CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-lpuart" |
Tom Rini | 5dc4dfd | 2017-08-28 07:16:32 -0400 | [diff] [blame] | 32 | CONFIG_ENV_IS_IN_FLASH=y |
Shaohui Xie | fdc2b54 | 2016-10-28 14:24:02 +0800 | [diff] [blame] | 33 | CONFIG_DM=y |
Tom Rini | 2852267 | 2017-03-01 16:51:58 -0500 | [diff] [blame] | 34 | CONFIG_FSL_CAAM=y |
Mario Six | 07dea2e | 2018-03-28 14:38:19 +0200 | [diff] [blame] | 35 | CONFIG_FSL_ESDHC=y |
Masahiro Yamada | e856bdc | 2017-02-11 22:43:54 +0900 | [diff] [blame] | 36 | CONFIG_MTD_NOR_FLASH=y |
Shaohui Xie | fdc2b54 | 2016-10-28 14:24:02 +0800 | [diff] [blame] | 37 | CONFIG_SPI_FLASH=y |
Alexandru Gagniuc | 3146f0c | 2017-08-01 17:19:59 -0700 | [diff] [blame] | 38 | CONFIG_PHYLIB=y |
Hou Zhiqiang | 31cbcb5 | 2018-02-05 13:46:47 +0800 | [diff] [blame] | 39 | CONFIG_E1000=y |
| 40 | CONFIG_PCI=y |
| 41 | CONFIG_DM_PCI=y |
| 42 | CONFIG_DM_PCI_COMPAT=y |
| 43 | CONFIG_PCIE_LAYERSCAPE=y |
Shaohui Xie | fdc2b54 | 2016-10-28 14:24:02 +0800 | [diff] [blame] | 44 | CONFIG_DM_SERIAL=y |
| 45 | CONFIG_FSL_LPUART=y |
Adam Ford | f1b1f77 | 2018-04-15 13:51:26 -0400 | [diff] [blame] | 46 | CONFIG_SPI=y |
Masahiro Yamada | 1878095 | 2016-12-07 22:10:25 +0900 | [diff] [blame] | 47 | CONFIG_DM_SPI=y |
| 48 | CONFIG_FSL_DSPI=y |
Tang Yuantian | 6b91aa4 | 2017-01-20 17:12:49 +0800 | [diff] [blame] | 49 | CONFIG_USB=y |
| 50 | CONFIG_DM_USB=y |
Tom Rini | ecad705 | 2017-08-25 17:50:26 -0400 | [diff] [blame] | 51 | CONFIG_USB_XHCI_HCD=y |
| 52 | CONFIG_USB_XHCI_DWC3=y |
| 53 | CONFIG_USB_STORAGE=y |