Kever Yang | 168eef7 | 2017-06-23 17:17:52 +0800 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2017 Rockchip Electronics Co., Ltd |
| 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0+ |
| 5 | */ |
| 6 | |
| 7 | #include <common.h> |
| 8 | #include <debug_uart.h> |
| 9 | #include <dm.h> |
| 10 | #include <ram.h> |
| 11 | #include <spl.h> |
| 12 | #include <asm/io.h> |
| 13 | #include <asm/arch/bootrom.h> |
| 14 | #include <asm/arch/cru_rk322x.h> |
| 15 | #include <asm/arch/grf_rk322x.h> |
| 16 | #include <asm/arch/hardware.h> |
| 17 | #include <asm/arch/timer.h> |
| 18 | #include <asm/arch/uart.h> |
| 19 | |
| 20 | u32 spl_boot_device(void) |
| 21 | { |
| 22 | return BOOT_DEVICE_MMC1; |
| 23 | } |
| 24 | DECLARE_GLOBAL_DATA_PTR; |
| 25 | |
| 26 | #define GRF_BASE 0x11000000 |
| 27 | #define SGRF_BASE 0x10140000 |
| 28 | |
| 29 | #define DEBUG_UART_BASE 0x11030000 |
| 30 | |
| 31 | void board_debug_uart_init(void) |
| 32 | { |
David Wu | 424324d | 2018-01-13 14:04:26 +0800 | [diff] [blame^] | 33 | static struct rk322x_grf * const grf = (void *)GRF_BASE; |
| 34 | enum { |
| 35 | GPIO1B2_SHIFT = 4, |
| 36 | GPIO1B2_MASK = 3 << GPIO1B2_SHIFT, |
| 37 | GPIO1B2_GPIO = 0, |
| 38 | GPIO1B2_UART1_SIN, |
| 39 | GPIO1B2_UART21_SIN, |
| 40 | |
| 41 | GPIO1B1_SHIFT = 2, |
| 42 | GPIO1B1_MASK = 3 << GPIO1B1_SHIFT, |
| 43 | GPIO1B1_GPIO = 0, |
| 44 | GPIO1B1_UART1_SOUT, |
| 45 | GPIO1B1_UART21_SOUT, |
| 46 | }; |
| 47 | enum { |
| 48 | CON_IOMUX_UART2SEL_SHIFT= 8, |
| 49 | CON_IOMUX_UART2SEL_MASK = 1 << CON_IOMUX_UART2SEL_SHIFT, |
| 50 | CON_IOMUX_UART2SEL_2 = 0, |
| 51 | CON_IOMUX_UART2SEL_21, |
| 52 | }; |
| 53 | |
Kever Yang | 168eef7 | 2017-06-23 17:17:52 +0800 | [diff] [blame] | 54 | /* Enable early UART2 channel 1 on the RK322x */ |
| 55 | rk_clrsetreg(&grf->gpio1b_iomux, |
| 56 | GPIO1B1_MASK | GPIO1B2_MASK, |
| 57 | GPIO1B2_UART21_SIN << GPIO1B2_SHIFT | |
| 58 | GPIO1B1_UART21_SOUT << GPIO1B1_SHIFT); |
| 59 | /* Set channel C as UART2 input */ |
| 60 | rk_clrsetreg(&grf->con_iomux, |
| 61 | CON_IOMUX_UART2SEL_MASK, |
| 62 | CON_IOMUX_UART2SEL_21 << CON_IOMUX_UART2SEL_SHIFT); |
| 63 | } |
Kever Yang | 18d38d3 | 2017-07-27 12:53:59 +0800 | [diff] [blame] | 64 | |
| 65 | #define SGRF_DDR_CON0 0x10150000 |
Kever Yang | 168eef7 | 2017-06-23 17:17:52 +0800 | [diff] [blame] | 66 | void board_init_f(ulong dummy) |
| 67 | { |
| 68 | struct udevice *dev; |
| 69 | int ret; |
| 70 | |
| 71 | /* |
| 72 | * Debug UART can be used from here if required: |
| 73 | * |
| 74 | * debug_uart_init(); |
| 75 | * printch('a'); |
| 76 | * printhex8(0x1234); |
| 77 | * printascii("string"); |
| 78 | */ |
| 79 | debug_uart_init(); |
| 80 | printascii("SPL Init"); |
| 81 | |
| 82 | ret = spl_early_init(); |
| 83 | if (ret) { |
| 84 | debug("spl_early_init() failed: %d\n", ret); |
| 85 | hang(); |
| 86 | } |
| 87 | |
| 88 | rockchip_timer_init(); |
| 89 | printf("timer init done\n"); |
| 90 | ret = uclass_get_device(UCLASS_RAM, 0, &dev); |
| 91 | if (ret) { |
| 92 | printf("DRAM init failed: %d\n", ret); |
| 93 | return; |
| 94 | } |
| 95 | |
Kever Yang | 18d38d3 | 2017-07-27 12:53:59 +0800 | [diff] [blame] | 96 | /* Disable the ddr secure region setting to make it non-secure */ |
| 97 | rk_clrreg(SGRF_DDR_CON0, 0x4000); |
Kever Yang | 168eef7 | 2017-06-23 17:17:52 +0800 | [diff] [blame] | 98 | #if defined(CONFIG_ROCKCHIP_SPL_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT) |
Philipp Tomsich | b82bd1f | 2017-10-10 16:21:16 +0200 | [diff] [blame] | 99 | back_to_bootrom(BROM_BOOT_NEXTSTAGE); |
Kever Yang | 168eef7 | 2017-06-23 17:17:52 +0800 | [diff] [blame] | 100 | #endif |
| 101 | } |