Marcel Ziswiler | 2bc2f81 | 2022-02-07 11:54:13 +0100 | [diff] [blame] | 1 | CONFIG_ARM=y |
| 2 | CONFIG_ARCH_IMX8M=y |
| 3 | CONFIG_SYS_TEXT_BASE=0x40200000 |
Marcel Ziswiler | 2bc2f81 | 2022-02-07 11:54:13 +0100 | [diff] [blame] | 4 | CONFIG_SPL_GPIO=y |
| 5 | CONFIG_SPL_LIBCOMMON_SUPPORT=y |
| 6 | CONFIG_SPL_LIBGENERIC_SUPPORT=y |
| 7 | CONFIG_NR_DRAM_BANKS=2 |
Marcel Ziswiler | 2bc2f81 | 2022-02-07 11:54:13 +0100 | [diff] [blame] | 8 | CONFIG_ENV_SIZE=0x2000 |
| 9 | CONFIG_ENV_OFFSET=0xFFFFDE00 |
| 10 | CONFIG_SYS_I2C_MXC_I2C1=y |
| 11 | CONFIG_SYS_I2C_MXC_I2C2=y |
| 12 | CONFIG_SYS_I2C_MXC_I2C3=y |
| 13 | CONFIG_SYS_I2C_MXC_I2C4=y |
| 14 | CONFIG_DM_GPIO=y |
Marcel Ziswiler | e6ad807 | 2022-07-21 15:46:44 +0200 | [diff] [blame] | 15 | CONFIG_DEFAULT_DEVICE_TREE="imx8mp-verdin-wifi-dev" |
Marcel Ziswiler | 2bc2f81 | 2022-02-07 11:54:13 +0100 | [diff] [blame] | 16 | CONFIG_SPL_TEXT_BASE=0x920000 |
| 17 | CONFIG_TARGET_VERDIN_IMX8MP=y |
Tom Rini | 1247c35 | 2022-08-23 15:24:14 -0400 | [diff] [blame] | 18 | CONFIG_SYS_PROMPT="Verdin iMX8MP # " |
Marcel Ziswiler | 2bc2f81 | 2022-02-07 11:54:13 +0100 | [diff] [blame] | 19 | CONFIG_SPL_MMC=y |
| 20 | CONFIG_SPL_SERIAL=y |
| 21 | CONFIG_SPL_DRIVERS_MISC=y |
| 22 | CONFIG_SPL=y |
| 23 | CONFIG_IMX_BOOTAUX=y |
| 24 | CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 |
Tom Rini | d46e86d | 2022-04-08 13:36:51 -0400 | [diff] [blame] | 25 | CONFIG_SYS_LOAD_ADDR=0x43500000 |
Tom Rini | 0a3689c | 2022-04-01 10:33:18 -0400 | [diff] [blame] | 26 | CONFIG_SYS_MEMTEST_START=0x40000000 |
| 27 | CONFIG_SYS_MEMTEST_END=0x80000000 |
Marcel Ziswiler | 2bc2f81 | 2022-02-07 11:54:13 +0100 | [diff] [blame] | 28 | CONFIG_DISTRO_DEFAULTS=y |
Tom Rini | eb8eb31 | 2022-03-11 07:12:48 -0500 | [diff] [blame] | 29 | CONFIG_REMAKE_ELF=y |
Marcel Ziswiler | 2bc2f81 | 2022-02-07 11:54:13 +0100 | [diff] [blame] | 30 | CONFIG_FIT=y |
| 31 | CONFIG_FIT_EXTERNAL_OFFSET=0x3000 |
| 32 | CONFIG_FIT_VERBOSE=y |
| 33 | CONFIG_SPL_LOAD_FIT=y |
| 34 | # CONFIG_USE_SPL_FIT_GENERATOR is not set |
| 35 | CONFIG_OF_SYSTEM_SETUP=y |
| 36 | CONFIG_BOOTDELAY=1 |
| 37 | CONFIG_USE_PREBOOT=y |
Philippe Schenker | dbc5633 | 2022-04-13 11:33:31 +0200 | [diff] [blame] | 38 | CONFIG_PREBOOT="test -n ${fdtfile} || setenv fdtfile imx8mp-verdin-${variant}-${fdt_board}.dtb" |
Marcel Ziswiler | 2bc2f81 | 2022-02-07 11:54:13 +0100 | [diff] [blame] | 39 | CONFIG_LOG=y |
| 40 | # CONFIG_DISPLAY_BOARDINFO is not set |
| 41 | CONFIG_DISPLAY_BOARDINFO_LATE=y |
| 42 | CONFIG_BOARD_EARLY_INIT_F=y |
| 43 | CONFIG_BOARD_LATE_INIT=y |
Tom Rini | ca8a329 | 2022-05-16 17:20:26 -0400 | [diff] [blame] | 44 | CONFIG_SPL_MAX_SIZE=0x26000 |
Tom Rini | 6600b35 | 2022-05-27 10:19:45 -0400 | [diff] [blame] | 45 | CONFIG_SPL_HAS_BSS_LINKER_SECTION=y |
| 46 | CONFIG_SPL_BSS_START_ADDR=0x98fc00 |
Tom Rini | 9b5f9ae | 2022-05-19 15:09:22 -0400 | [diff] [blame] | 47 | CONFIG_SPL_BSS_MAX_SIZE=0x400 |
Marcel Ziswiler | 2bc2f81 | 2022-02-07 11:54:13 +0100 | [diff] [blame] | 48 | CONFIG_SPL_BOARD_INIT=y |
| 49 | CONFIG_SPL_BOOTROM_SUPPORT=y |
| 50 | CONFIG_SPL_SYS_MALLOC_SIMPLE=y |
Tom Rini | f113d7d | 2022-05-26 13:13:21 -0400 | [diff] [blame] | 51 | # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set |
| 52 | CONFIG_SPL_STACK=0x960000 |
Tom Rini | 10f6e4d | 2022-05-27 12:48:32 -0400 | [diff] [blame] | 53 | CONFIG_SYS_SPL_MALLOC=y |
| 54 | CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y |
| 55 | CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 |
| 56 | CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 |
Marcel Ziswiler | 2bc2f81 | 2022-02-07 11:54:13 +0100 | [diff] [blame] | 57 | CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y |
| 58 | CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 |
| 59 | CONFIG_SPL_I2C=y |
| 60 | CONFIG_SPL_POWER=y |
| 61 | CONFIG_SPL_WATCHDOG=y |
Tom Rini | cf49358 | 2022-05-11 16:21:06 -0400 | [diff] [blame] | 62 | CONFIG_SYS_MAXARGS=64 |
Tom Rini | d31466b | 2022-05-11 18:01:06 -0400 | [diff] [blame] | 63 | CONFIG_SYS_CBSIZE=2048 |
Tom Rini | d0ee7f2 | 2022-05-11 17:38:09 -0400 | [diff] [blame] | 64 | CONFIG_SYS_PBSIZE=2081 |
Marcel Ziswiler | 2bc2f81 | 2022-02-07 11:54:13 +0100 | [diff] [blame] | 65 | # CONFIG_BOOTM_NETBSD is not set |
| 66 | CONFIG_CMD_ASKENV=y |
| 67 | # CONFIG_CMD_EXPORTENV is not set |
| 68 | # CONFIG_CMD_CRC32 is not set |
| 69 | CONFIG_CMD_MEMTEST=y |
| 70 | CONFIG_CMD_CLK=y |
| 71 | CONFIG_CMD_FUSE=y |
| 72 | CONFIG_CMD_GPIO=y |
| 73 | CONFIG_CMD_I2C=y |
| 74 | CONFIG_CMD_MMC=y |
| 75 | CONFIG_CMD_READ=y |
| 76 | CONFIG_CMD_USB=y |
| 77 | CONFIG_CMD_CACHE=y |
| 78 | CONFIG_CMD_UUID=y |
| 79 | CONFIG_CMD_REGULATOR=y |
| 80 | CONFIG_CMD_EXT4_WRITE=y |
| 81 | # CONFIG_ISO_PARTITION is not set |
| 82 | # CONFIG_EFI_PARTITION is not set |
| 83 | CONFIG_OF_CONTROL=y |
| 84 | CONFIG_SPL_OF_CONTROL=y |
| 85 | CONFIG_ENV_OVERWRITE=y |
| 86 | CONFIG_ENV_IS_IN_MMC=y |
| 87 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
| 88 | CONFIG_SYS_MMC_ENV_DEV=2 |
| 89 | CONFIG_SYS_MMC_ENV_PART=1 |
| 90 | CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y |
Tom Rini | 0e14cdf | 2022-03-11 09:12:07 -0500 | [diff] [blame] | 91 | CONFIG_USE_ETHPRIME=y |
| 92 | CONFIG_ETHPRIME="eth0" |
Marcel Ziswiler | 2bc2f81 | 2022-02-07 11:54:13 +0100 | [diff] [blame] | 93 | CONFIG_VERSION_VARIABLE=y |
| 94 | CONFIG_IP_DEFRAG=y |
| 95 | CONFIG_TFTP_BLOCKSIZE=4096 |
| 96 | CONFIG_SPL_DM=y |
| 97 | CONFIG_REGMAP=y |
| 98 | CONFIG_SYSCON=y |
| 99 | CONFIG_BOOTCOUNT_LIMIT=y |
| 100 | CONFIG_BOOTCOUNT_ENV=y |
| 101 | CONFIG_CLK_COMPOSITE_CCF=y |
| 102 | CONFIG_CLK_IMX8MP=y |
| 103 | CONFIG_GPIO_HOG=y |
| 104 | CONFIG_MXC_GPIO=y |
| 105 | CONFIG_DM_PCA953X=y |
| 106 | CONFIG_DM_I2C=y |
| 107 | # CONFIG_SPL_DM_I2C is not set |
| 108 | CONFIG_SPL_SYS_I2C_LEGACY=y |
| 109 | CONFIG_MISC=y |
| 110 | CONFIG_I2C_EEPROM=y |
| 111 | CONFIG_SUPPORT_EMMC_BOOT=y |
| 112 | CONFIG_MMC_IO_VOLTAGE=y |
| 113 | CONFIG_MMC_UHS_SUPPORT=y |
| 114 | CONFIG_MMC_HS400_ES_SUPPORT=y |
| 115 | CONFIG_MMC_HS400_SUPPORT=y |
| 116 | CONFIG_FSL_USDHC=y |
| 117 | CONFIG_PHY_ADDR_ENABLE=y |
| 118 | CONFIG_PHY_MICREL=y |
| 119 | CONFIG_PHY_MICREL_KSZ90X1=y |
Marcel Ziswiler | 2bc2f81 | 2022-02-07 11:54:13 +0100 | [diff] [blame] | 120 | CONFIG_DM_ETH_PHY=y |
| 121 | CONFIG_DWC_ETH_QOS=y |
| 122 | CONFIG_DWC_ETH_QOS_IMX=y |
| 123 | CONFIG_FEC_MXC=y |
| 124 | CONFIG_RGMII=y |
| 125 | CONFIG_MII=y |
| 126 | CONFIG_PINCTRL=y |
| 127 | CONFIG_SPL_PINCTRL=y |
| 128 | CONFIG_PINCTRL_IMX8M=y |
| 129 | CONFIG_SPL_POWER_LEGACY=y |
| 130 | CONFIG_POWER_DOMAIN=y |
| 131 | CONFIG_IMX8M_POWER_DOMAIN=y |
| 132 | CONFIG_DM_REGULATOR=y |
| 133 | CONFIG_DM_REGULATOR_FIXED=y |
| 134 | CONFIG_DM_REGULATOR_GPIO=y |
| 135 | CONFIG_SPL_POWER_I2C=y |
Marcel Ziswiler | 4551e18 | 2022-04-08 10:06:57 +0200 | [diff] [blame] | 136 | CONFIG_DM_SERIAL=y |
Marcel Ziswiler | 2bc2f81 | 2022-02-07 11:54:13 +0100 | [diff] [blame] | 137 | CONFIG_MXC_UART=y |
| 138 | CONFIG_SYSRESET=y |
| 139 | CONFIG_SPL_SYSRESET=y |
| 140 | CONFIG_SYSRESET_PSCI=y |
| 141 | CONFIG_SYSRESET_WATCHDOG=y |
| 142 | CONFIG_DM_THERMAL=y |
| 143 | CONFIG_USB=y |
| 144 | # CONFIG_SPL_DM_USB is not set |
| 145 | CONFIG_USB_EHCI_HCD=y |
| 146 | CONFIG_IMX_WATCHDOG=y |
| 147 | CONFIG_OF_LIBFDT_OVERLAY=y |