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Sergei Poselenov9531a232010-09-09 23:03:31 +02001/*
2 * (C) Copyright 2003-2005
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * (C) Copyright 2010
6 * Sergei Poselenov, Emcraft Systems, sposelenov@emcraft.com.
7 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +02008 * SPDX-License-Identifier: GPL-2.0+
Sergei Poselenov9531a232010-09-09 23:03:31 +02009 */
10
11#ifndef __CONFIG_H
12#define __CONFIG_H
13
14/*
15 * High Level Configuration Options
16 * (easy to change)
17 */
18
Masahiro Yamadab2a6dfe2014-01-16 11:03:07 +090019#define CONFIG_MPC5200 1 /* This is a MPC5200 CPU */
Sergei Poselenov9531a232010-09-09 23:03:31 +020020#define CONFIG_A4M072 1 /* ... on A4M072 board */
21#define CONFIG_MPC5200_DDR 1 /* ... use DDR RAM */
Stefan Roese746a36a2014-11-19 09:37:46 +010022#define CONFIG_DISPLAY_BOARDINFO
23#define CONFIG_SYS_GENERIC_BOARD
Sergei Poselenov9531a232010-09-09 23:03:31 +020024
Wolfgang Denkc8d76ea2010-10-18 23:43:37 +020025#define CONFIG_SYS_TEXT_BASE 0xFE000000
26
Sergei Poselenov9531a232010-09-09 23:03:31 +020027#define CONFIG_MISC_INIT_R
28
29#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
30
Sergei Poselenov9531a232010-09-09 23:03:31 +020031#define CONFIG_HIGH_BATS 1 /* High BATs supported */
32
33/*
34 * Serial console configuration
35 */
36#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
37#define CONFIG_BAUDRATE 9600 /* ... at 9600 bps */
38#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
39/* define to enable silent console */
40#define CONFIG_SILENT_CONSOLE
41#define CONFIG_SYS_DEVICE_NULLDEV 1 /* include nulldev device */
42
43/*
44 * PCI Mapping:
45 * 0x40000000 - 0x4fffffff - PCI Memory
46 * 0x50000000 - 0x50ffffff - PCI IO Space
47 */
48#define CONFIG_PCI
49
50#if defined(CONFIG_PCI)
51#define CONFIG_PCI_PNP 1
52#define CONFIG_PCI_SCAN_SHOW 1
53#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
54
55#define CONFIG_PCI_MEM_BUS 0x40000000
56#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
57#define CONFIG_PCI_MEM_SIZE 0x10000000
58
59#define CONFIG_PCI_IO_BUS 0x50000000
60#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
61#define CONFIG_PCI_IO_SIZE 0x01000000
62#endif
63
64#define CONFIG_SYS_XLB_PIPELINING 1
65
Wolfgang Denk071bc922010-10-27 22:48:30 +020066#undef CONFIG_EEPRO100
Sergei Poselenov9531a232010-09-09 23:03:31 +020067
68/* Partitions */
69#define CONFIG_MAC_PARTITION
70#define CONFIG_DOS_PARTITION
71
72/* USB */
73#define CONFIG_USB_OHCI_NEW
74#define CONFIG_USB_STORAGE
75#define CONFIG_SYS_OHCI_BE_CONTROLLER
76#undef CONFIG_SYS_USB_OHCI_BOARD_INIT
77#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
78#define CONFIG_SYS_USB_OHCI_REGS_BASE MPC5XXX_USB
79#define CONFIG_SYS_USB_OHCI_SLOT_NAME "mpc5200"
80#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
81
82#define CONFIG_TIMESTAMP /* Print image info with timestamp */
83
84/*
85 * BOOTP options
86 */
87#define CONFIG_BOOTP_BOOTFILESIZE
88#define CONFIG_BOOTP_BOOTPATH
89#define CONFIG_BOOTP_GATEWAY
90#define CONFIG_BOOTP_HOSTNAME
91
92
93/*
94 * Command line configuration.
95 */
96#include <config_cmd_default.h>
97
98#define CONFIG_CMD_EEPROM
99#define CONFIG_CMD_FAT
100#define CONFIG_CMD_I2C
101#define CONFIG_CMD_IDE
102#define CONFIG_CMD_NFS
103#define CONFIG_CMD_SNTP
104#define CONFIG_CMD_USB
105#define CONFIG_CMD_MII
106#define CONFIG_CMD_DHCP
107#define CONFIG_CMD_PING
Ilya Yanokcb5639c2010-09-09 23:03:33 +0200108#define CONFIG_CMD_DISPLAY
Sergei Poselenov9531a232010-09-09 23:03:31 +0200109
110#if defined(CONFIG_PCI)
111#define CONFIG_CMD_PCI
112#endif
113
Wolfgang Denkc8d76ea2010-10-18 23:43:37 +0200114#if (CONFIG_SYS_TEXT_BASE == 0xFE000000) /* Boot low with 32 MB Flash */
Sergei Poselenov9531a232010-09-09 23:03:31 +0200115#define CONFIG_SYS_LOWBOOT 1
116#define CONFIG_SYS_LOWBOOT32 1
117#endif
118
119/*
120 * Autobooting
121 */
122#define CONFIG_BOOTDELAY 2 /* autoboot after 2 seconds */
123
124#define CONFIG_SYS_AUTOLOAD "n"
125
126#define CONFIG_AUTOBOOT_KEYED
127#define CONFIG_AUTOBOOT_PROMPT "autoboot in %d seconds\n", bootdelay
128#define CONFIG_AUTOBOOT_DELAY_STR "asdfg"
129
130#undef CONFIG_BOOTARGS
131#define CONFIG_PREBOOT "run try_update"
132
133#define CONFIG_EXTRA_ENV_SETTINGS \
Ilya Yanok7ae54992010-10-21 17:20:09 +0200134 "bk=run add_mtd ; run add_consolespec ; bootm 200000\0" \
135 "cf1=diskboot 200000 0:1\0" \
136 "bootcmd_cf1=run bcf1\0" \
137 "bcf=setenv bootargs root=/dev/hda3\0" \
138 "bootcmd_nfs=run bnfs\0" \
139 "norargs=setenv bootargs root=/dev/mtdblock3 rootfstype=cramfs "\
140 "panic=1\0" \
141 "bootcmd_nor=cp.b ${kernel_addr} 200000 100000;" \
142 "run norargs addip; run bk\0" \
143 "bnfs=nfs 200000 ${rootpath}/boot/uImage;" \
144 "run nfsargs addip ; run bk\0" \
145 "nfsargs=setenv bootargs root=/dev/nfs rw " \
146 "nfsroot=${serverip}:${rootpath}\0" \
147 "try_update=usb start;sleep 2;usb start;sleep 1;" \
148 "fatload usb 0 2F0000 PCPUUPDT 2FF;usb stop;" \
149 "source 2F0000\0" \
150 "env_addr=FE060000\0" \
151 "kernel_addr=FE100000\0" \
152 "rootfs_addr=FE200000\0" \
153 "add_mtd=setenv bootargs ${bootargs} mtdparts=" \
154 "phys_mapped_flash:384k(u),640k(e),1m(k),30m(r)\0" \
155 "bcf1=run cf1; run bcf; run addip; run bk\0" \
156 "add_consolespec=setenv bootargs ${bootargs} " \
157 "console=/dev/null quiet\0" \
158 "addip=if test -n ${ethaddr};" \
159 "then if test -n ${ipaddr};" \
160 "then setenv bootargs ${bootargs} " \
161 "ip=${ipaddr}:${serverip}:${gatewayip}:"\
162 "${netmask}:${hostname}:${netdev}:off;" \
163 "fi;" \
164 "else;" \
165 "setenv bootargs ${bootargs} no_ethaddr;" \
166 "fi\0" \
167 "hostname=CPUP0\0" \
168 "ethaddr=00:00:00:00:00:00\0" \
169 "netdev=eth0\0" \
170 "bootcmd=run bootcmd_nor\0" \
Sergei Poselenov9531a232010-09-09 23:03:31 +0200171 ""
172/*
173 * IPB Bus clocking configuration.
174 */
175#undef CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
176
177/*
178 * I2C configuration
179 */
180#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
181#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #1 or #2 */
182
183#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
184#define CONFIG_SYS_I2C_SLAVE 0x7F
185
186/*
187 * EEPROM configuration
188 */
189#define CONFIG_SYS_I2C_EEPROM_ADDR 0x52 /* 1010010x */
190#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
191#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
192#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
193#define CONFIG_SYS_EEPROM_WREN 1
194#define CONFIG_SYS_EEPROM_WP GPIO_PSC2_4
195
196/*
197 * Flash configuration
198 */
199#define CONFIG_SYS_FLASH_BASE 0xFE000000
200#define CONFIG_SYS_FLASH_SIZE 0x02000000
201#if !defined(CONFIG_SYS_LOWBOOT)
202#error "CONFIG_SYS_LOWBOOT not defined?"
203#else /* CONFIG_SYS_LOWBOOT */
204#if defined(CONFIG_SYS_LOWBOOT32)
205#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00060000)
206#endif
207#endif /* CONFIG_SYS_LOWBOOT */
208
209#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
210#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max num of sects on one chip */
211#define CONFIG_FLASH_CFI_DRIVER
212#define CONFIG_SYS_FLASH_CFI
213#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
214#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_CS0_START}
Ilya Yanoke36aff62010-10-21 17:20:13 +0200215#define CONFIG_SYS_FLASH_BANKS_SIZES {CONFIG_SYS_CS0_SIZE}
Sergei Poselenov9531a232010-09-09 23:03:31 +0200216
217/*
218 * Environment settings
219 */
220#define CONFIG_ENV_IS_IN_FLASH 1
221#define CONFIG_ENV_SIZE 0x10000
222#define CONFIG_ENV_SECT_SIZE 0x20000
223#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
224#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
225
226#define CONFIG_ENV_OVERWRITE 1
227
228/*
229 * Memory map
230 */
231#define CONFIG_SYS_MBAR 0xF0000000
232#define CONFIG_SYS_SDRAM_BASE 0x00000000
233#define CONFIG_SYS_DEFAULT_MBAR 0x80000000
234
235/* Use SRAM until RAM will be available */
236#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
Wolfgang Denk553f0982010-10-26 13:32:32 +0200237#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE /* Size of used area in DPRAM */
Sergei Poselenov9531a232010-09-09 23:03:31 +0200238
239
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200240#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
Sergei Poselenov9531a232010-09-09 23:03:31 +0200241#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
242
Wolfgang Denkc8d76ea2010-10-18 23:43:37 +0200243#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Sergei Poselenov9531a232010-09-09 23:03:31 +0200244#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
245# define CONFIG_SYS_RAMBOOT 1
246#endif
247
248#define CONFIG_SYS_MONITOR_LEN (384 << 10) /* Reserve 384 kB for Monitor */
249#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
250#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
251
252/*
253 * Ethernet configuration
254 */
255#define CONFIG_MPC5xxx_FEC 1
256#define CONFIG_MPC5xxx_FEC_MII100
257/*
258 * Define CONFIG_MPC5xxx_FEC_MII10 to force FEC at 10Mb
259 */
260/* #define CONFIG_MPC5xxx_FEC_MII10 */
261#define CONFIG_PHY_ADDR 0x1f
262#define CONFIG_PHY_TYPE 0x79c874 /* AMD Phy Controller */
263
264/*
265 * GPIO configuration
266 */
Ilya Yanokcb5639c2010-09-09 23:03:33 +0200267#define CONFIG_SYS_GPS_PORT_CONFIG 0x18000004
Sergei Poselenov9531a232010-09-09 23:03:31 +0200268
269/*
270 * Miscellaneous configurable options
271 */
272#define CONFIG_SYS_HUSH_PARSER
273#define CONFIG_CMDLINE_EDITING 1
Sergei Poselenov9531a232010-09-09 23:03:31 +0200274#define CONFIG_SYS_LONGHELP /* undef to save memory */
Sergei Poselenov9531a232010-09-09 23:03:31 +0200275#if defined(CONFIG_CMD_KGDB)
276#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
277#else
278#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
279#endif
280#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
281#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
282#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
283
284#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
285#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
286
287#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
288
Sergei Poselenov9531a232010-09-09 23:03:31 +0200289#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
290#if defined(CONFIG_CMD_KGDB)
291# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
292#endif
293
294
295/*
296 * Various low-level settings
297 */
298#define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
299#define CONFIG_SYS_HID0_FINAL HID0_ICE
300/* Flash at CSBoot, CS0 */
301#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
302#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
303#define CONFIG_SYS_BOOTCS_CFG 0x0002DD00
304#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
305#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
306/* External SRAM at CS1 */
307#define CONFIG_SYS_CS1_START 0x62000000
308#define CONFIG_SYS_CS1_SIZE 0x00400000
309#define CONFIG_SYS_CS1_CFG 0x00009930
310#define CONFIG_SYS_SRAM_BASE CONFIG_SYS_CS1_START
311#define CONFIG_SYS_SRAM_SIZE CONFIG_SYS_CS1_SIZE
Ilya Yanokcb5639c2010-09-09 23:03:33 +0200312/* LED display at CS7 */
313#define CONFIG_SYS_CS7_START 0x6a000000
314#define CONFIG_SYS_CS7_SIZE (64*1024)
315#define CONFIG_SYS_CS7_CFG 0x0000bf30
Sergei Poselenov9531a232010-09-09 23:03:31 +0200316
317#define CONFIG_SYS_CS_BURST 0x00000000
318#define CONFIG_SYS_CS_DEADCYCLE 0x33333003
319
320#define CONFIG_SYS_RESET_ADDRESS 0xff000000
321
322/*-----------------------------------------------------------------------
323 * USB stuff
324 *-----------------------------------------------------------------------
325 */
326#define CONFIG_USB_CLOCK 0x0001BBBB
327#define CONFIG_USB_CONFIG 0x00001000 /* 0x4000 for SE mode */
328
329/*-----------------------------------------------------------------------
330 * IDE/ATA stuff Supports IDE harddisk
331 *-----------------------------------------------------------------------
332 */
333
334#undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */
335
336#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
337#undef CONFIG_IDE_LED /* LED for ide not supported */
338
339#define CONFIG_IDE_PREINIT
340
341#define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */
342#define CONFIG_SYS_IDE_MAXDEVICE 1 /* max. 2 drives per IDE bus */
343
344#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000
345
346#define CONFIG_SYS_ATA_BASE_ADDR MPC5XXX_ATA
347
348/* Offset for data I/O */
349#define CONFIG_SYS_ATA_DATA_OFFSET (0x0060)
350
351/* Offset for normal register accesses */
352#define CONFIG_SYS_ATA_REG_OFFSET (CONFIG_SYS_ATA_DATA_OFFSET)
353
354/* Offset for alternate registers */
355#define CONFIG_SYS_ATA_ALT_OFFSET (0x005C)
356
357/* Interval between registers */
358#define CONFIG_SYS_ATA_STRIDE 4
359
360#define CONFIG_ATAPI 1
361
362/*-----------------------------------------------------------------------
363 * Open firmware flat tree support
364 *-----------------------------------------------------------------------
365 */
366#define CONFIG_OF_LIBFDT 1
367#define CONFIG_OF_BOARD_SETUP 1
368
369#define OF_CPU "PowerPC,5200@0"
370#define OF_SOC "soc5200@f0000000"
371#define OF_TBCLK (bd->bi_busfreq / 4)
372#define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
373
Ilya Yanokcb5639c2010-09-09 23:03:33 +0200374/* Support for the 7-segment display */
375#define CONFIG_SYS_DISP_CHR_RAM CONFIG_SYS_CS7_START
376#define CONFIG_SHOW_ACTIVITY /* used for display realization */
377
Ilya Yanok92d1a402010-09-09 23:03:34 +0200378#define CONFIG_SHOW_BOOT_PROGRESS
379
Sergei Poselenov9531a232010-09-09 23:03:31 +0200380#endif /* __CONFIG_H */