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Rick Chen872cd422017-11-15 16:03:34 +08001Andestech ATCSPI200 SPI controller Device Tree Bindings
2-------------------------------------------------------
3ATCSPI200 is a Serial Peripheral Interface (SPI) controller
4which serves as a SPI master or a SPI slave.
5
6It is often be embedded in AE3XX and AE250 platforms.
7
8Required properties:
9- compatible: has to be "andestech,atcspi200".
10- reg: Base address and size of the controllers memory area.
11- #address-cells: <1>, as required by generic SPI binding.
12- #size-cells: <0>, also as required by generic SPI binding.
13- interrupts: Property with a value describing the interrupt number.
14- clocks: Clock phandles (see clock bindings for details).
15- spi-max-frequency: Maximum SPI clocking speed of device in Hz.
16
17Optional properties:
18- num-cs: Number of chip selects used.
19
20Example:
21
22 spi: spi@f0b00000 {
23 compatible = "andestech,atcspi200";
24 reg = <0xf0b00000 0x1000>;
25 #address-cells = <1>;
26 #size-cells = <0>;
27 num-cs = <1>;
28 clocks = <&spiclk>;
29 interrupts = <3 4>;
30 flash@0 {
Neil Armstrong5991d0e2019-02-10 10:16:23 +000031 compatible = "jedec,spi-nor";
Rick Chen872cd422017-11-15 16:03:34 +080032 spi-max-frequency = <50000000>;
33 reg = <0>;
34 spi-cpol;
35 spi-cpha;
36 };
37 };