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wdenkbf9e3b32004-02-12 00:47:09 +00001/*
2 * MCF5272 Internal Memory Map
3 *
4 * Copyright (c) 2003 Josef Baumgartner <josef.baumgartner@telex.de>
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25#ifndef __IMMAP_5272__
26#define __IMMAP_5272__
27
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020028#define MMAP_CFG (CONFIG_SYS_MBAR + 0x00000000)
29#define MMAP_INTC (CONFIG_SYS_MBAR + 0x00000020)
30#define MMAP_FBCS (CONFIG_SYS_MBAR + 0x00000040)
31#define MMAP_GPIO (CONFIG_SYS_MBAR + 0x00000080)
32#define MMAP_QSPI (CONFIG_SYS_MBAR + 0x000000A0)
33#define MMAP_PWM (CONFIG_SYS_MBAR + 0x000000C0)
34#define MMAP_DMA0 (CONFIG_SYS_MBAR + 0x000000E0)
35#define MMAP_UART0 (CONFIG_SYS_MBAR + 0x00000100)
36#define MMAP_UART1 (CONFIG_SYS_MBAR + 0x00000140)
37#define MMAP_SDRAM (CONFIG_SYS_MBAR + 0x00000180)
38#define MMAP_TMR0 (CONFIG_SYS_MBAR + 0x00000200)
39#define MMAP_TMR1 (CONFIG_SYS_MBAR + 0x00000220)
40#define MMAP_TMR2 (CONFIG_SYS_MBAR + 0x00000240)
41#define MMAP_TMR3 (CONFIG_SYS_MBAR + 0x00000260)
42#define MMAP_WDOG (CONFIG_SYS_MBAR + 0x00000280)
43#define MMAP_PLIC (CONFIG_SYS_MBAR + 0x00000300)
44#define MMAP_FEC (CONFIG_SYS_MBAR + 0x00000840)
45#define MMAP_USB (CONFIG_SYS_MBAR + 0x00001000)
TsiChungLiew56115662007-08-15 19:38:15 -050046
47/* System configuration registers */
48typedef struct sys_ctrl {
49 uint sc_mbar;
50 ushort sc_scr;
51 ushort sc_spr;
52 uint sc_pmr;
53 char res1[2];
54 ushort sc_alpr;
55 uint sc_dir;
56 char res2[12];
wdenkbf9e3b32004-02-12 00:47:09 +000057} sysctrl_t;
58
TsiChungLiew56115662007-08-15 19:38:15 -050059/* Interrupt module registers */
wdenkbf9e3b32004-02-12 00:47:09 +000060typedef struct int_ctrl {
TsiChungLiew56115662007-08-15 19:38:15 -050061 uint int_icr1;
62 uint int_icr2;
63 uint int_icr3;
64 uint int_icr4;
65 uint int_isr;
66 uint int_pitr;
67 uint int_piwr;
68 uchar res1[3];
69 uchar int_pivr;
wdenkbf9e3b32004-02-12 00:47:09 +000070} intctrl_t;
71
TsiChungLiew56115662007-08-15 19:38:15 -050072/* Chip select module registers */
73typedef struct cs_ctlr {
74 uint cs_br0;
75 uint cs_or0;
76 uint cs_br1;
77 uint cs_or1;
78 uint cs_br2;
79 uint cs_or2;
80 uint cs_br3;
81 uint cs_or3;
82 uint cs_br4;
83 uint cs_or4;
84 uint cs_br5;
85 uint cs_or5;
86 uint cs_br6;
87 uint cs_or6;
88 uint cs_br7;
89 uint cs_or7;
wdenkbf9e3b32004-02-12 00:47:09 +000090} csctrl_t;
91
TsiChungLiew56115662007-08-15 19:38:15 -050092/* GPIO port registers */
93typedef struct gpio_ctrl {
94 uint gpio_pacnt;
95 ushort gpio_paddr;
96 ushort gpio_padat;
97 uint gpio_pbcnt;
98 ushort gpio_pbddr;
99 ushort gpio_pbdat;
100 uchar res1[4];
101 ushort gpio_pcddr;
102 ushort gpio_pcdat;
103 uint gpio_pdcnt;
104 uchar res2[4];
wdenkbf9e3b32004-02-12 00:47:09 +0000105} gpio_t;
106
TsiChungLiew56115662007-08-15 19:38:15 -0500107/* QSPI module registers */
108typedef struct qspi_ctrl {
109 ushort qspi_qmr;
110 uchar res1[2];
111 ushort qspi_qdlyr;
112 uchar res2[2];
113 ushort qspi_qwr;
114 uchar res3[2];
115 ushort qspi_qir;
116 uchar res4[2];
117 ushort qspi_qar;
118 uchar res5[2];
119 ushort qspi_qdr;
120 uchar res6[10];
wdenkbf9e3b32004-02-12 00:47:09 +0000121} qspi_t;
122
TsiChungLiew56115662007-08-15 19:38:15 -0500123/* PWM module registers */
124typedef struct pwm_ctrl {
125 uchar pwm_pwcr0;
126 uchar res1[3];
127 uchar pwm_pwcr1;
128 uchar res2[3];
129 uchar pwm_pwcr2;
130 uchar res3[7];
131 uchar pwm_pwwd0;
132 uchar res4[3];
133 uchar pwm_pwwd1;
134 uchar res5[3];
135 uchar pwm_pwwd2;
136 uchar res6[7];
wdenkbf9e3b32004-02-12 00:47:09 +0000137} pwm_t;
138
TsiChungLiew56115662007-08-15 19:38:15 -0500139/* DMA module registers */
140typedef struct dma_ctrl {
141 ulong dma_dmr;
142 uchar res1[2];
143 ushort dma_dir;
144 ulong dma_dbcr;
145 ulong dma_dsar;
146 ulong dma_ddar;
147 uchar res2[12];
wdenkbf9e3b32004-02-12 00:47:09 +0000148} dma_t;
149
TsiChungLiew56115662007-08-15 19:38:15 -0500150/* SDRAM controller registers, offset: 0x180 */
wdenkbf9e3b32004-02-12 00:47:09 +0000151typedef struct sdram_ctrl {
TsiChungLiew56115662007-08-15 19:38:15 -0500152 uchar res1[2];
153 ushort sdram_sdcr;
154 uchar res2[2];
155 ushort sdram_sdtr;
156 uchar res3[120];
wdenkbf9e3b32004-02-12 00:47:09 +0000157} sdramctrl_t;
158
TsiChungLiew56115662007-08-15 19:38:15 -0500159/* Watchdog registers */
wdenkbf9e3b32004-02-12 00:47:09 +0000160typedef struct wdog_ctrl {
TsiChungLiew56115662007-08-15 19:38:15 -0500161 ushort wdog_wrrr;
162 ushort res1;
163 ushort wdog_wirr;
164 ushort res2;
165 ushort wdog_wcr;
166 ushort res3;
167 ushort wdog_wer;
168 uchar res4[114];
wdenkbf9e3b32004-02-12 00:47:09 +0000169} wdog_t;
170
TsiChungLiew56115662007-08-15 19:38:15 -0500171/* PLIC module registers */
wdenkbf9e3b32004-02-12 00:47:09 +0000172typedef struct plic_ctrl {
TsiChungLiew56115662007-08-15 19:38:15 -0500173 ulong plic_p0b1rr;
174 ulong plic_p1b1rr;
175 ulong plic_p2b1rr;
176 ulong plic_p3b1rr;
177 ulong plic_p0b2rr;
178 ulong plic_p1b2rr;
179 ulong plic_p2b2rr;
180 ulong plic_p3b2rr;
181 uchar plic_p0drr;
182 uchar plic_p1drr;
183 uchar plic_p2drr;
184 uchar plic_p3drr;
185 uchar res1[4];
186 ulong plic_p0b1tr;
187 ulong plic_p1b1tr;
188 ulong plic_p2b1tr;
189 ulong plic_p3b1tr;
190 ulong plic_p0b2tr;
191 ulong plic_p1b2tr;
192 ulong plic_p2b2tr;
193 ulong plic_p3b2tr;
194 uchar plic_p0dtr;
195 uchar plic_p1dtr;
196 uchar plic_p2dtr;
197 uchar plic_p3dtr;
198 uchar res2[4];
199 ushort plic_p0cr;
200 ushort plic_p1cr;
201 ushort plic_p2cr;
202 ushort plic_p3cr;
203 ushort plic_p0icr;
204 ushort plic_p1icr;
205 ushort plic_p2icr;
206 ushort plic_p3icr;
207 ushort plic_p0gmr;
208 ushort plic_p1gmr;
209 ushort plic_p2gmr;
210 ushort plic_p3gmr;
211 ushort plic_p0gmt;
212 ushort plic_p1gmt;
213 ushort plic_p2gmt;
214 ushort plic_p3gmt;
215 uchar res3;
216 uchar plic_pgmts;
217 uchar plic_pgmta;
218 uchar res4;
219 uchar plic_p0gcir;
220 uchar plic_p1gcir;
221 uchar plic_p2gcir;
222 uchar plic_p3gcir;
223 uchar plic_p0gcit;
224 uchar plic_p1gcit;
225 uchar plic_p2gcit;
226 uchar plic_p3gcit;
227 uchar res5[3];
228 uchar plic_pgcitsr;
229 uchar res6[3];
230 uchar plic_pdcsr;
231 ushort plic_p0psr;
232 ushort plic_p1psr;
233 ushort plic_p2psr;
234 ushort plic_p3psr;
235 ushort plic_pasr;
236 uchar res7;
237 uchar plic_plcr;
238 ushort res8;
239 ushort plic_pdrqr;
240 ushort plic_p0sdr;
241 ushort plic_p1sdr;
242 ushort plic_p2sdr;
243 ushort plic_p3sdr;
244 ushort res9;
245 ushort plic_pcsr;
246 uchar res10[1184];
wdenkbf9e3b32004-02-12 00:47:09 +0000247} plic_t;
248
TsiChungLiew56115662007-08-15 19:38:15 -0500249/* USB module registers */
wdenkbf9e3b32004-02-12 00:47:09 +0000250typedef struct usb {
TsiChungLiew56115662007-08-15 19:38:15 -0500251 ushort res1;
252 ushort usb_fnr;
253 ushort res2;
254 ushort usb_fnmr;
255 ushort res3;
256 ushort usb_rfmr;
257 ushort res4;
258 ushort usb_rfmmr;
259 uchar res5[3];
260 uchar usb_far;
261 ulong usb_asr;
262 ulong usb_drr1;
263 ulong usb_drr2;
264 ushort res6;
265 ushort usb_specr;
266 ushort res7;
267 ushort usb_ep0sr;
268 ulong usb_iep0cfg;
269 ulong usb_oep0cfg;
270 ulong usb_ep1cfg;
271 ulong usb_ep2cfg;
272 ulong usb_ep3cfg;
273 ulong usb_ep4cfg;
274 ulong usb_ep5cfg;
275 ulong usb_ep6cfg;
276 ulong usb_ep7cfg;
277 ulong usb_ep0ctl;
278 ushort res8;
279 ushort usb_ep1ctl;
280 ushort res9;
281 ushort usb_ep2ctl;
282 ushort res10;
283 ushort usb_ep3ctl;
284 ushort res11;
285 ushort usb_ep4ctl;
286 ushort res12;
287 ushort usb_ep5ctl;
288 ushort res13;
289 ushort usb_ep6ctl;
290 ushort res14;
291 ushort usb_ep7ctl;
292 ulong usb_ep0isr;
293 ushort res15;
294 ushort usb_ep1isr;
295 ushort res16;
296 ushort usb_ep2isr;
297 ushort res17;
298 ushort usb_ep3isr;
299 ushort res18;
300 ushort usb_ep4isr;
301 ushort res19;
302 ushort usb_ep5isr;
303 ushort res20;
304 ushort usb_ep6isr;
305 ushort res21;
306 ushort usb_ep7isr;
307 ulong usb_ep0imr;
308 ushort res22;
309 ushort usb_ep1imr;
310 ushort res23;
311 ushort usb_ep2imr;
312 ushort res24;
313 ushort usb_ep3imr;
314 ushort res25;
315 ushort usb_ep4imr;
316 ushort res26;
317 ushort usb_ep5imr;
318 ushort res27;
319 ushort usb_ep6imr;
320 ushort res28;
321 ushort usb_ep7imr;
322 ulong usb_ep0dr;
323 ulong usb_ep1dr;
324 ulong usb_ep2dr;
325 ulong usb_ep3dr;
326 ulong usb_ep4dr;
327 ulong usb_ep5dr;
328 ulong usb_ep6dr;
329 ulong usb_ep7dr;
330 ushort res29;
331 ushort usb_ep0dpr;
332 ushort res30;
333 ushort usb_ep1dpr;
334 ushort res31;
335 ushort usb_ep2dpr;
336 ushort res32;
337 ushort usb_ep3dpr;
338 ushort res33;
339 ushort usb_ep4dpr;
340 ushort res34;
341 ushort usb_ep5dpr;
342 ushort res35;
343 ushort usb_ep6dpr;
344 ushort res36;
345 ushort usb_ep7dpr;
346 uchar res37[788];
347 uchar usb_cfgram[1024];
wdenkbf9e3b32004-02-12 00:47:09 +0000348} usb_t;
349
TsiChungLiew56115662007-08-15 19:38:15 -0500350#endif /* __IMMAP_5272__ */