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Daniel Hellstromab68f922008-03-28 10:20:43 +01001/* Configuration header file for LEON2 GRSIM.
2 *
3 * (C) Copyright 2003-2005
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 *
6 * (C) Copyright 2007
7 * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
8 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +02009 * SPDX-License-Identifier: GPL-2.0+
Daniel Hellstromab68f922008-03-28 10:20:43 +010010 */
11
12#ifndef __CONFIG_H__
13#define __CONFIG_H__
14
15/*
16 * High Level Configuration Options
17 * (easy to change)
18 *
19 * Select between TSIM or GRSIM by setting CONFIG_GRSIM or CONFIG_TSIM to 1.
20 *
21 * TSIM command
22 * tsim-leon -sdram 0 -ram 32000 -rom 8192 -mmu
23 *
24 */
25
26#define CONFIG_LEON2 /* This is an LEON2 CPU */
27#define CONFIG_LEON 1 /* This is an LEON CPU */
28#define CONFIG_GRSIM 0 /* ... not running on GRSIM */
29#define CONFIG_TSIM 1 /* ... running on TSIM */
30
31/* CPU / AMBA BUS configuration */
Wolfgang Denk53677ef2008-05-20 16:00:29 +020032#define CONFIG_SYS_CLK_FREQ 40000000 /* 40MHz */
Daniel Hellstromab68f922008-03-28 10:20:43 +010033
34/* Number of SPARC register windows */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020035#define CONFIG_SYS_SPARC_NWINDOWS 8
Daniel Hellstromab68f922008-03-28 10:20:43 +010036
37/*
38 * Serial console configuration
39 */
40#define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020041#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
Daniel Hellstromab68f922008-03-28 10:20:43 +010042
43/* Partitions */
44#define CONFIG_DOS_PARTITION
45#define CONFIG_MAC_PARTITION
46#define CONFIG_ISO_PARTITION
47
48/*
49 * Supported commands
50 */
Wolfgang Denk74de7ae2009-04-01 23:34:12 +020051#define CONFIG_CMD_BDI /* bdinfo */
52#define CONFIG_CMD_CONSOLE /* coninfo */
Daniel Hellstromab68f922008-03-28 10:20:43 +010053#define CONFIG_CMD_DIAG
Wolfgang Denk74de7ae2009-04-01 23:34:12 +020054#define CONFIG_CMD_ECHO /* echo arguments */
55#define CONFIG_CMD_FPGA /* FPGA configuration Support */
Daniel Hellstromab68f922008-03-28 10:20:43 +010056#define CONFIG_CMD_IRQ
Wolfgang Denk74de7ae2009-04-01 23:34:12 +020057#define CONFIG_CMD_ITEST /* Integer (and string) test */
58#define CONFIG_CMD_LOADB /* loadb */
59#define CONFIG_CMD_LOADS /* loads */
Daniel Hellstromab68f922008-03-28 10:20:43 +010060#define CONFIG_CMD_MISC /* Misc functions like sleep etc */
61#define CONFIG_CMD_REGINFO
Wolfgang Denk74de7ae2009-04-01 23:34:12 +020062#define CONFIG_CMD_RUN /* run command in env variable */
63#define CONFIG_CMD_SETGETDCR /* DCR support on 4xx */
64#define CONFIG_CMD_SOURCE /* "source" command support */
65#define CONFIG_CMD_XIMG /* Load part of Multi Image */
Daniel Hellstromab68f922008-03-28 10:20:43 +010066
67/*
68 * Autobooting
69 */
70#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
71
72#define CONFIG_PREBOOT "echo;" \
73 "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
74 "echo"
75
76#undef CONFIG_BOOTARGS
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020077/*#define CONFIG_SYS_HUSH_PARSER 0*/
Daniel Hellstromab68f922008-03-28 10:20:43 +010078
79#define CONFIG_EXTRA_ENV_SETTINGS \
80 "netdev=eth0\0" \
81 "nfsargs=setenv bootargs root=/dev/nfs rw " \
82 "nfsroot=${serverip}:${rootpath}\0" \
83 "ramargs=setenv bootargs root=/dev/ram rw\0" \
84 "addip=setenv bootargs ${bootargs} " \
85 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
86 ":${hostname}:${netdev}:off panic=1\0" \
87 "flash_nfs=run nfsargs addip;" \
88 "bootm ${kernel_addr}\0" \
89 "flash_self=run ramargs addip;" \
90 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
91 "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \
92 "rootpath=/export/roofs\0" \
93 "scratch=40000000\0" \
Mike Frysinger3a2b9f22011-10-12 19:47:51 +000094 "getkernel=tftpboot $(scratch) $(bootfile)\0" \
Daniel Hellstromab68f922008-03-28 10:20:43 +010095 "ethaddr=00:00:7A:CC:00:12\0" \
96 "bootargs=console=ttyS0,38400" \
97 ""
98#define CONFIG_NETMASK 255.255.255.0
99#define CONFIG_GATEWAYIP 192.168.0.1
100#define CONFIG_SERVERIP 192.168.0.81
101#define CONFIG_IPADDR 192.168.0.80
Joe Hershberger8b3637c2011-10-13 13:03:47 +0000102#define CONFIG_ROOTPATH "/export/rootfs"
Daniel Hellstromab68f922008-03-28 10:20:43 +0100103#define CONFIG_HOSTNAME grxc3s1500
Joe Hershbergerb3f44c22011-10-13 13:03:48 +0000104#define CONFIG_BOOTFILE "/uImage"
Daniel Hellstromab68f922008-03-28 10:20:43 +0100105
106#define CONFIG_BOOTCOMMAND "run flash_self"
107
108/* Memory MAP
109 *
110 * Flash:
111 * |--------------------------------|
112 * | 0x00000000 Text & Data & BSS | *
113 * | for Monitor | *
114 * | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| *
115 * | UNUSED / Growth | * 256kb
116 * |--------------------------------|
117 * | 0x00050000 Base custom area | *
118 * | kernel / FS | *
119 * | | * Rest of Flash
120 * |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~|
121 * | END-0x00008000 Environment | * 32kb
122 * |--------------------------------|
123 *
124 *
125 *
126 * Main Memory:
127 * |--------------------------------|
128 * | UNUSED / scratch area |
129 * | |
130 * | |
131 * | |
132 * | |
133 * |--------------------------------|
134 * | Monitor .Text / .DATA / .BSS | * 256kb
135 * | Relocated! | *
136 * |--------------------------------|
137 * | Monitor Malloc | * 128kb (contains relocated environment)
138 * |--------------------------------|
139 * | Monitor/kernel STACK | * 64kb
140 * |--------------------------------|
141 * | Page Table for MMU systems | * 2k
142 * |--------------------------------|
143 * | PROM Code accessed from Linux | * 6kb-128b
144 * |--------------------------------|
145 * | Global data (avail from kernel)| * 128b
146 * |--------------------------------|
147 *
148 */
149
150/*
151 * Flash configuration (8,16 or 32 MB)
152 * TEXT base always at 0xFFF00000
153 * ENV_ADDR always at 0xFFF40000
154 * FLASH_BASE at 0xFC000000 for 64 MB
155 * 0xFE000000 for 32 MB
156 * 0xFF000000 for 16 MB
157 * 0xFF800000 for 8 MB
158 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200159#define CONFIG_SYS_NO_FLASH 1
160#define CONFIG_SYS_FLASH_BASE 0x00000000
161#define CONFIG_SYS_FLASH_SIZE 0x00800000
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200162#define CONFIG_ENV_SIZE 0x8000
Daniel Hellstromab68f922008-03-28 10:20:43 +0100163
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200164#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SIZE)
Daniel Hellstromab68f922008-03-28 10:20:43 +0100165
166#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200167#define CONFIG_SYS_MAX_FLASH_SECT 64 /* max num of sects on one chip */
168#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
Daniel Hellstromab68f922008-03-28 10:20:43 +0100169
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200170#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
171#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
172#define CONFIG_SYS_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */
173#define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */
Daniel Hellstromab68f922008-03-28 10:20:43 +0100174
175#ifdef ENABLE_FLASH_SUPPORT
176/* For use with grsim FLASH emulation extension */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200177#define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
Daniel Hellstromab68f922008-03-28 10:20:43 +0100178
179#undef CONFIG_FLASH_8BIT /* Flash is 32-bit */
180
181/*** CFI CONFIG ***/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200182#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +0200183#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200184#define CONFIG_SYS_FLASH_CFI
Daniel Hellstromab68f922008-03-28 10:20:43 +0100185#endif
186
187/*
188 * Environment settings
189 */
Jean-Christophe PLAGNIOL-VILLARD93f6d722008-09-10 22:48:00 +0200190#define CONFIG_ENV_IS_NOWHERE 1
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200191/*#define CONFIG_ENV_IS_IN_FLASH*/
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200192/*#define CONFIG_ENV_SIZE 0x8000*/
193#define CONFIG_ENV_SECT_SIZE 0x40000
Daniel Hellstromab68f922008-03-28 10:20:43 +0100194#define CONFIG_ENV_OVERWRITE 1
195
196/*
197 * Memory map
198 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200199#define CONFIG_SYS_SDRAM_BASE 0x40000000
200#define CONFIG_SYS_SDRAM_SIZE 0x00800000
201#define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_SDRAM_SIZE)
Daniel Hellstromab68f922008-03-28 10:20:43 +0100202
203/* no SRAM available */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200204#undef CONFIG_SYS_SRAM_BASE
205#undef CONFIG_SYS_SRAM_SIZE
Daniel Hellstromab68f922008-03-28 10:20:43 +0100206
207
208/* Always Run U-Boot from SDRAM */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200209#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE
210#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE
211#define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END
Daniel Hellstromab68f922008-03-28 10:20:43 +0100212
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200213#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_RAM_END - GENERATED_GBL_DATA_SIZE)
Daniel Hellstromab68f922008-03-28 10:20:43 +0100214
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200215#define CONFIG_SYS_PROM_SIZE (8192-GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200216#define CONFIG_SYS_PROM_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE)
Daniel Hellstromab68f922008-03-28 10:20:43 +0100217
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200218#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32)
219#define CONFIG_SYS_STACK_SIZE (0x10000-32)
Daniel Hellstromab68f922008-03-28 10:20:43 +0100220
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200221#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200222#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
223# define CONFIG_SYS_RAMBOOT 1
Daniel Hellstromab68f922008-03-28 10:20:43 +0100224#endif
225
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200226#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
227#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
228#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
Daniel Hellstromab68f922008-03-28 10:20:43 +0100229
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200230#define CONFIG_SYS_MALLOC_END (CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE)
231#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN)
Daniel Hellstromab68f922008-03-28 10:20:43 +0100232
233/* relocated monitor area */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200234#define CONFIG_SYS_RELOC_MONITOR_MAX_END CONFIG_SYS_MALLOC_BASE
235#define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN)
Daniel Hellstromab68f922008-03-28 10:20:43 +0100236
237/* make un relocated address from relocated address */
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200238#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE))
Daniel Hellstromab68f922008-03-28 10:20:43 +0100239
240/*
241 * Ethernet configuration
242 */
243/*#define CONFIG_GRETH 1*/
Daniel Hellstromab68f922008-03-28 10:20:43 +0100244
245/* Default HARDWARE address */
246#define GRETH_HWADDR_0 0x00
247#define GRETH_HWADDR_1 0x00
248#define GRETH_HWADDR_2 0x7A
249#define GRETH_HWADDR_3 0xcc
250#define GRETH_HWADDR_4 0x00
251#define GRETH_HWADDR_5 0x12
252
253#define CONFIG_ETHADDR 00:00:7a:cc:00:12
254
255/*
256 * Define CONFIG_GRETH_10MBIT to force GRETH at 10Mb/s
257 */
258/* #define CONFIG_GRETH_10MBIT 1 */
259#define CONFIG_PHY_ADDR 0x00
260
261/*
262 * Miscellaneous configurable options
263 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200264#define CONFIG_SYS_LONGHELP /* undef to save memory */
Daniel Hellstromab68f922008-03-28 10:20:43 +0100265#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200266#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
Daniel Hellstromab68f922008-03-28 10:20:43 +0100267#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200268#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
Daniel Hellstromab68f922008-03-28 10:20:43 +0100269#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200270#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
271#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
272#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
Daniel Hellstromab68f922008-03-28 10:20:43 +0100273
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200274#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
275#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
Daniel Hellstromab68f922008-03-28 10:20:43 +0100276
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200277#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
Daniel Hellstromab68f922008-03-28 10:20:43 +0100278
Daniel Hellstromab68f922008-03-28 10:20:43 +0100279/***** Gaisler GRLIB IP-Cores Config ********/
280
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200281#define CONFIG_SYS_GRLIB_SDRAM 0
282#define CONFIG_SYS_GRLIB_MEMCFG1 (0x000000ff | (1<<11))
Daniel Hellstromab68f922008-03-28 10:20:43 +0100283#if CONFIG_GRSIM
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200284#define CONFIG_SYS_GRLIB_MEMCFG2 0x82206000
Daniel Hellstromab68f922008-03-28 10:20:43 +0100285#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200286#define CONFIG_SYS_GRLIB_MEMCFG2 0x00001820
Daniel Hellstromab68f922008-03-28 10:20:43 +0100287#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200288#define CONFIG_SYS_GRLIB_MEMCFG3 0x00136000
Daniel Hellstromab68f922008-03-28 10:20:43 +0100289
290/*** LEON2 UART 1 ***/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200291#define CONFIG_SYS_LEON2_UART1_SCALER \
Wolfgang Denk1aeed8d2008-04-13 09:59:26 -0700292 ((((CONFIG_SYS_CLK_FREQ*10)/(CONFIG_BAUDRATE*8))-5)/10)
293
Daniel Hellstromab68f922008-03-28 10:20:43 +0100294/* UART1 Define to 1 or 0 */
295#define LEON2_UART1_LOOPBACK_ENABLE 0
296#define LEON2_UART1_FLOWCTRL_ENABLE 0
297#define LEON2_UART1_PARITY_ENABLE 0
298#define LEON2_UART1_ODDPAR_ENABLE 0
299
300/*** LEON2 UART 2 ***/
301
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200302#define CONFIG_SYS_LEON2_UART2_SCALER \
Wolfgang Denk1aeed8d2008-04-13 09:59:26 -0700303 ((((CONFIG_SYS_CLK_FREQ*10)/(CONFIG_BAUDRATE*8))-5)/10)
Daniel Hellstromab68f922008-03-28 10:20:43 +0100304
305/* UART2 Define to 1 or 0 */
306#define LEON2_UART2_LOOPBACK_ENABLE 0
307#define LEON2_UART2_FLOWCTRL_ENABLE 0
308#define LEON2_UART2_PARITY_ENABLE 0
309#define LEON2_UART2_ODDPAR_ENABLE 0
310
311#define LEON_CONSOLE_UART1 1
312#define LEON_CONSOLE_UART2 2
313
314/* Use UART2 as console */
315#define LEON2_CONSOLE_SELECT LEON_CONSOLE_UART1
316
317/* LEON2 I/O Port */
318/*#define LEON2_IO_PORT_DIR 0x0000aa00*/
319
320/* default kernel command line */
321#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"
322
323#define CONFIG_IDENT_STRING "Gaisler GRSIM LEON2"
324
325#endif /* __CONFIG_H */