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Marek Vasut6b6440d2011-11-08 23:18:13 +00001/*
2 * Freescale i.MX28 GPIO control code
3 *
4 * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
5 * on behalf of DENX Software Engineering GmbH
6 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Marek Vasut6b6440d2011-11-08 23:18:13 +00008 */
9
10#include <common.h>
11#include <netdev.h>
12#include <asm/errno.h>
13#include <asm/io.h>
14#include <asm/arch/iomux.h>
15#include <asm/arch/imx-regs.h>
16
17#if defined(CONFIG_MX23)
18#define PINCTRL_BANKS 3
19#define PINCTRL_DOUT(n) (0x0500 + ((n) * 0x10))
20#define PINCTRL_DIN(n) (0x0600 + ((n) * 0x10))
21#define PINCTRL_DOE(n) (0x0700 + ((n) * 0x10))
22#define PINCTRL_PIN2IRQ(n) (0x0800 + ((n) * 0x10))
23#define PINCTRL_IRQEN(n) (0x0900 + ((n) * 0x10))
24#define PINCTRL_IRQSTAT(n) (0x0c00 + ((n) * 0x10))
25#elif defined(CONFIG_MX28)
26#define PINCTRL_BANKS 5
27#define PINCTRL_DOUT(n) (0x0700 + ((n) * 0x10))
28#define PINCTRL_DIN(n) (0x0900 + ((n) * 0x10))
29#define PINCTRL_DOE(n) (0x0b00 + ((n) * 0x10))
30#define PINCTRL_PIN2IRQ(n) (0x1000 + ((n) * 0x10))
31#define PINCTRL_IRQEN(n) (0x1100 + ((n) * 0x10))
32#define PINCTRL_IRQSTAT(n) (0x1400 + ((n) * 0x10))
33#else
34#error "Please select CONFIG_MX23 or CONFIG_MX28"
35#endif
36
37#define GPIO_INT_FALL_EDGE 0x0
38#define GPIO_INT_LOW_LEV 0x1
39#define GPIO_INT_RISE_EDGE 0x2
40#define GPIO_INT_HIGH_LEV 0x3
41#define GPIO_INT_LEV_MASK (1 << 0)
42#define GPIO_INT_POL_MASK (1 << 1)
43
44void mxs_gpio_init(void)
45{
46 int i;
47
48 for (i = 0; i < PINCTRL_BANKS; i++) {
49 writel(0, MXS_PINCTRL_BASE + PINCTRL_PIN2IRQ(i));
50 writel(0, MXS_PINCTRL_BASE + PINCTRL_IRQEN(i));
51 /* Use SCT address here to clear the IRQSTAT bits */
52 writel(0xffffffff, MXS_PINCTRL_BASE + PINCTRL_IRQSTAT(i) + 8);
53 }
54}
55
Joe Hershberger365d6072011-11-11 15:55:36 -060056int gpio_get_value(unsigned gpio)
Marek Vasut6b6440d2011-11-08 23:18:13 +000057{
Joe Hershberger365d6072011-11-11 15:55:36 -060058 uint32_t bank = PAD_BANK(gpio);
Marek Vasut6b6440d2011-11-08 23:18:13 +000059 uint32_t offset = PINCTRL_DIN(bank);
Otavio Salvadorddcf13b2012-08-05 09:05:30 +000060 struct mxs_register_32 *reg =
61 (struct mxs_register_32 *)(MXS_PINCTRL_BASE + offset);
Marek Vasut6b6440d2011-11-08 23:18:13 +000062
Joe Hershberger365d6072011-11-11 15:55:36 -060063 return (readl(&reg->reg) >> PAD_PIN(gpio)) & 1;
Marek Vasut6b6440d2011-11-08 23:18:13 +000064}
65
Joe Hershberger365d6072011-11-11 15:55:36 -060066void gpio_set_value(unsigned gpio, int value)
Marek Vasut6b6440d2011-11-08 23:18:13 +000067{
Joe Hershberger365d6072011-11-11 15:55:36 -060068 uint32_t bank = PAD_BANK(gpio);
Marek Vasut6b6440d2011-11-08 23:18:13 +000069 uint32_t offset = PINCTRL_DOUT(bank);
Otavio Salvadorddcf13b2012-08-05 09:05:30 +000070 struct mxs_register_32 *reg =
71 (struct mxs_register_32 *)(MXS_PINCTRL_BASE + offset);
Marek Vasut6b6440d2011-11-08 23:18:13 +000072
73 if (value)
Joe Hershberger365d6072011-11-11 15:55:36 -060074 writel(1 << PAD_PIN(gpio), &reg->reg_set);
Marek Vasut6b6440d2011-11-08 23:18:13 +000075 else
Joe Hershberger365d6072011-11-11 15:55:36 -060076 writel(1 << PAD_PIN(gpio), &reg->reg_clr);
Marek Vasut6b6440d2011-11-08 23:18:13 +000077}
78
Joe Hershberger365d6072011-11-11 15:55:36 -060079int gpio_direction_input(unsigned gpio)
Marek Vasut6b6440d2011-11-08 23:18:13 +000080{
Joe Hershberger365d6072011-11-11 15:55:36 -060081 uint32_t bank = PAD_BANK(gpio);
Marek Vasut6b6440d2011-11-08 23:18:13 +000082 uint32_t offset = PINCTRL_DOE(bank);
Otavio Salvadorddcf13b2012-08-05 09:05:30 +000083 struct mxs_register_32 *reg =
84 (struct mxs_register_32 *)(MXS_PINCTRL_BASE + offset);
Marek Vasut6b6440d2011-11-08 23:18:13 +000085
Joe Hershberger365d6072011-11-11 15:55:36 -060086 writel(1 << PAD_PIN(gpio), &reg->reg_clr);
Marek Vasut6b6440d2011-11-08 23:18:13 +000087
88 return 0;
89}
90
Joe Hershberger365d6072011-11-11 15:55:36 -060091int gpio_direction_output(unsigned gpio, int value)
Marek Vasut6b6440d2011-11-08 23:18:13 +000092{
Joe Hershberger365d6072011-11-11 15:55:36 -060093 uint32_t bank = PAD_BANK(gpio);
Marek Vasut6b6440d2011-11-08 23:18:13 +000094 uint32_t offset = PINCTRL_DOE(bank);
Otavio Salvadorddcf13b2012-08-05 09:05:30 +000095 struct mxs_register_32 *reg =
96 (struct mxs_register_32 *)(MXS_PINCTRL_BASE + offset);
Marek Vasut6b6440d2011-11-08 23:18:13 +000097
Joe Hershberger365d6072011-11-11 15:55:36 -060098 writel(1 << PAD_PIN(gpio), &reg->reg_set);
Marek Vasut6b6440d2011-11-08 23:18:13 +000099
Joe Hershberger365d6072011-11-11 15:55:36 -0600100 gpio_set_value(gpio, value);
Marek Vasut6b6440d2011-11-08 23:18:13 +0000101
102 return 0;
103}
104
Joe Hershberger365d6072011-11-11 15:55:36 -0600105int gpio_request(unsigned gpio, const char *label)
Marek Vasut6b6440d2011-11-08 23:18:13 +0000106{
Joe Hershberger365d6072011-11-11 15:55:36 -0600107 if (PAD_BANK(gpio) >= PINCTRL_BANKS)
108 return -1;
Marek Vasut6b6440d2011-11-08 23:18:13 +0000109
110 return 0;
111}
112
Joe Hershberger365d6072011-11-11 15:55:36 -0600113int gpio_free(unsigned gpio)
Marek Vasut6b6440d2011-11-08 23:18:13 +0000114{
Joe Hershberger365d6072011-11-11 15:55:36 -0600115 return 0;
Marek Vasut6b6440d2011-11-08 23:18:13 +0000116}