blob: 92901b1b94a5226abdb941fcf319997078546c56 [file] [log] [blame]
wdenk3bac3512003-03-12 10:41:04 +00001/*
2**=====================================================================
3**
4** Copyright (C) 2000, 2001, 2002, 2003
5** The LEOX team <team@leox.org>, http://www.leox.org
6**
7** LEOX.org is about the development of free hardware and software resources
8** for system on chip.
9**
10** Description: U-Boot port on the LEOX's ELPT860 CPU board
11** ~~~~~~~~~~~
12**
13**=====================================================================
14**
15** This program is free software; you can redistribute it and/or
16** modify it under the terms of the GNU General Public License as
17** published by the Free Software Foundation; either version 2 of
18** the License, or (at your option) any later version.
19**
20** This program is distributed in the hope that it will be useful,
21** but WITHOUT ANY WARRANTY; without even the implied warranty of
22** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23** GNU General Public License for more details.
24**
25** You should have received a copy of the GNU General Public License
26** along with this program; if not, write to the Free Software
27** Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28** MA 02111-1307 USA
29**
30**=====================================================================
31*/
32
33OUTPUT_ARCH(powerpc)
wdenk3bac3512003-03-12 10:41:04 +000034/* Do we need any of these for elf?
35 __DYNAMIC = 0; */
36SECTIONS
37{
38 /* Read-only sections, merged into text segment: */
39 . = + SIZEOF_HEADERS;
40 .interp : { *(.interp) }
41 .hash : { *(.hash) }
42 .dynsym : { *(.dynsym) }
43 .dynstr : { *(.dynstr) }
44 .rel.text : { *(.rel.text) }
Wolfgang Denkdd520bf2006-11-30 18:02:20 +010045 .rela.text : { *(.rela.text) }
wdenk3bac3512003-03-12 10:41:04 +000046 .rel.data : { *(.rel.data) }
Wolfgang Denkdd520bf2006-11-30 18:02:20 +010047 .rela.data : { *(.rela.data) }
48 .rel.rodata : { *(.rel.rodata) }
49 .rela.rodata : { *(.rela.rodata) }
wdenk3bac3512003-03-12 10:41:04 +000050 .rel.got : { *(.rel.got) }
51 .rela.got : { *(.rela.got) }
52 .rel.ctors : { *(.rel.ctors) }
53 .rela.ctors : { *(.rela.ctors) }
54 .rel.dtors : { *(.rel.dtors) }
55 .rela.dtors : { *(.rela.dtors) }
56 .rel.bss : { *(.rel.bss) }
57 .rela.bss : { *(.rela.bss) }
58 .rel.plt : { *(.rel.plt) }
59 .rela.plt : { *(.rela.plt) }
60 .init : { *(.init) }
61 .plt : { *(.plt) }
62 .text :
63 {
64 /* WARNING - the following is hand-optimized to fit within */
65 /* the sector layout of our flash chips! XXX FIXME XXX */
66
Stefan Roesea47a12b2010-04-15 16:07:28 +020067 arch/powerpc/cpu/mpc8xx/start.o (.text)
wdenk3bac3512003-03-12 10:41:04 +000068 common/dlmalloc.o (.text)
Peter Tyser78acc472010-04-12 22:28:05 -050069 lib/vsprintf.o (.text)
70 lib/crc32.o (.text)
wdenk3bac3512003-03-12 10:41:04 +000071
72 . = env_offset;
Jean-Christophe PLAGNIOL-VILLARD0cf4fd32008-09-10 22:48:01 +020073 common/env_embedded.o (.text)
wdenk3bac3512003-03-12 10:41:04 +000074
75 *(.text)
wdenk3bac3512003-03-12 10:41:04 +000076 *(.got1)
77 }
78 _etext = .;
79 PROVIDE (etext = .);
80 .rodata :
81 {
82 *(.rodata)
83 *(.rodata1)
Wolfgang Denk74812662005-12-12 16:06:05 +010084 *(.rodata.str1.4)
85 *(.eh_frame)
wdenk3bac3512003-03-12 10:41:04 +000086 }
87 .fini : { *(.fini) } =0
88 .ctors : { *(.ctors) }
89 .dtors : { *(.dtors) }
90
91 /* Read-write section, merged into data segment: */
92 . = (. + 0x0FFF) & 0xFFFFF000;
93 _erotext = .;
94 PROVIDE (erotext = .);
95 .reloc :
96 {
97 *(.got)
98 _GOT2_TABLE_ = .;
99 *(.got2)
100 _FIXUP_TABLE_ = .;
101 *(.fixup)
102 }
103 __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
104 __fixup_entries = (. - _FIXUP_TABLE_)>>2;
105
106 .data :
107 {
108 *(.data)
109 *(.data1)
110 *(.sdata)
111 *(.sdata2)
112 *(.dynamic)
113 CONSTRUCTORS
114 }
115 _edata = .;
116 PROVIDE (edata = .);
117
118 __start___ex_table = .;
119 __ex_table : { *(__ex_table) }
120 __stop___ex_table = .;
121
122 . = ALIGN(4096);
123 __init_begin = .;
124 .text.init : { *(.text.init) }
125 .data.init : { *(.data.init) }
126 . = ALIGN(4096);
127 __init_end = .;
128
129 __bss_start = .;
130 .bss :
131 {
132 *(.sbss) *(.scommon)
133 *(.dynbss)
134 *(.bss)
135 *(COMMON)
136 }
Po-Yu Chuang44c6e652011-03-01 22:59:59 +0000137 __bss_end__ = . ;
wdenk3bac3512003-03-12 10:41:04 +0000138 PROVIDE (end = .);
139}