| Chunfeng Yun | 44f5c9a | 2020-05-02 11:35:21 +0200 | [diff] [blame^] | 1 | MediaTek xHCI |
| 2 | |
| 3 | The device node for USB3 host controller on MediaTek SoCs. |
| 4 | |
| 5 | Required properties: |
| 6 | - compatible : should be "mediatek,mtk-xhci" |
| 7 | - reg : specifies physical base address and size of the registers |
| 8 | - reg-names: should be "mac" for xHCI MAC and "ippc" for IP port control |
| 9 | - power-domains : a phandle to USB power domain node to control USB's |
| 10 | MTCMOS |
| 11 | - vusb33-supply : regulator of USB avdd3.3v |
| 12 | |
| 13 | - clocks : a list of phandle + clock-specifier pairs, one for each |
| 14 | entry in clock-names |
| 15 | - clock-names : must contain |
| 16 | "sys_ck": controller clock used by normal mode, |
| 17 | the following ones are optional: |
| 18 | "ref_ck": reference clock used by low power mode etc, |
| 19 | "mcu_ck": mcu_bus clock for register access, |
| 20 | "dma_ck": dma_bus clock for data transfer by DMA, |
| 21 | "xhci_ck": controller clock |
| 22 | |
| 23 | - phys : list of all the USB PHYs on this HCD |
| 24 | - phy-names: name specifier for the USB PHY |
| 25 | |
| 26 | Optional properties: |
| 27 | - vbus-supply : reference to the VBUS regulator; |
| 28 | |
| 29 | Example: |
| 30 | xhci: usb@1a0c0000 { |
| 31 | compatible = "mediatek,mt7629-xhci", "mediatek,mtk-xhci"; |
| 32 | reg = <0x1a0c0000 0x1000>, <0x1a0c3e00 0x0100>; |
| 33 | reg-names = "mac", "ippc"; |
| 34 | power-domains = <&scpsys MT7629_POWER_DOMAIN_HIF1>; |
| 35 | clocks = <&ssusbsys CLK_SSUSB_SYS_EN>, <&ssusbsys CLK_SSUSB_REF_EN>, |
| 36 | <&ssusbsys CLK_SSUSB_MCU_EN>, <&ssusbsys CLK_SSUSB_DMA_EN>; |
| 37 | clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck"; |
| 38 | phys = <&u2port0 PHY_TYPE_USB2>, <&u3port0 PHY_TYPE_USB3>; |
| 39 | status = "disabled"; |
| 40 | }; |