blob: 4f160a664e8f469c285d637ee5e56d98dd2f3b81 [file] [log] [blame]
TsiChung Liew8e585f02007-06-18 13:50:13 -05001/*
2 *
3 * (C) Copyright 2000-2003
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 *
Alison Wangaa0d99f2012-03-26 21:49:05 +00006 * Copyright (C) 2004-2008, 2012 Freescale Semiconductor, Inc.
TsiChung Liew8e585f02007-06-18 13:50:13 -05007 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
8 *
9 * See file CREDITS for list of people who contributed to this
10 * project.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA
26 */
27
28#include <common.h>
29#include <watchdog.h>
30#include <command.h>
Ben Warren89973f82008-08-31 22:22:04 -070031#include <netdev.h>
TsiChung Liew8e585f02007-06-18 13:50:13 -050032
TsiChungLiew7a17e752007-07-05 23:01:22 -050033#include <asm/immap.h>
Alison Wangaa0d99f2012-03-26 21:49:05 +000034#include <asm/io.h>
TsiChung Liew8e585f02007-06-18 13:50:13 -050035
Wolfgang Denk1218abf2007-09-15 20:48:41 +020036DECLARE_GLOBAL_DATA_PTR;
37
Mike Frysinger882b7d72010-10-20 03:41:17 -040038int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
TsiChung Liew8e585f02007-06-18 13:50:13 -050039{
Alison Wangaa0d99f2012-03-26 21:49:05 +000040 rcm_t *rcm = (rcm_t *) (MMAP_RCM);
TsiChung Liew8e585f02007-06-18 13:50:13 -050041
TsiChung Liew8e585f02007-06-18 13:50:13 -050042 udelay(1000);
Alison Wangaa0d99f2012-03-26 21:49:05 +000043 setbits_8(&rcm->rcr, RCM_RCR_SOFTRST);
TsiChung Liew8e585f02007-06-18 13:50:13 -050044
45 /* we don't return! */
46 return 0;
47};
48
49int checkcpu(void)
50{
Alison Wangaa0d99f2012-03-26 21:49:05 +000051 ccm_t *ccm = (ccm_t *) MMAP_CCM;
TsiChung Liew8e585f02007-06-18 13:50:13 -050052 u16 msk;
53 u16 id = 0;
54 u8 ver;
55
56 puts("CPU: ");
Alison Wangaa0d99f2012-03-26 21:49:05 +000057 msk = (in_be16(&ccm->cir) >> 6);
58 ver = (in_be16(&ccm->cir) & 0x003f);
TsiChung Liew8e585f02007-06-18 13:50:13 -050059 switch (msk) {
TsiChung Liew536e7da2008-10-22 11:38:21 +000060#ifdef CONFIG_MCF5301x
61 case 0x78:
62 id = 53010;
63 break;
64 case 0x77:
65 id = 53012;
66 break;
67 case 0x76:
68 id = 53015;
69 break;
70 case 0x74:
71 id = 53011;
72 break;
73 case 0x73:
74 id = 53013;
75 break;
76#endif
77#ifdef CONFIG_MCF532x
TsiChung Liew8e585f02007-06-18 13:50:13 -050078 case 0x54:
79 id = 5329;
80 break;
81 case 0x59:
82 id = 5328;
83 break;
84 case 0x61:
85 id = 5327;
86 break;
TsiChungLiewaa5f1f92008-01-14 17:23:08 -060087 case 0x65:
88 id = 5373;
89 break;
90 case 0x68:
91 id = 53721;
92 break;
93 case 0x69:
94 id = 5372;
95 break;
96 case 0x6B:
97 id = 5372;
98 break;
TsiChung Liew536e7da2008-10-22 11:38:21 +000099#endif
TsiChung Liew8e585f02007-06-18 13:50:13 -0500100 }
101
102 if (id) {
Wolfgang Denk08ef89e2008-10-19 02:35:49 +0200103 char buf1[32], buf2[32];
104
TsiChung Liew8e585f02007-06-18 13:50:13 -0500105 printf("Freescale MCF%d (Mask:%01x Version:%x)\n", id, msk,
106 ver);
Wolfgang Denk08ef89e2008-10-19 02:35:49 +0200107 printf(" CPU CLK %s MHz BUS CLK %s MHz\n",
TsiChung Liew1b270842008-10-22 11:55:30 +0000108 strmhz(buf1, gd->cpu_clk),
109 strmhz(buf2, gd->bus_clk));
TsiChung Liew8e585f02007-06-18 13:50:13 -0500110 }
111
112 return 0;
113};
114
115#if defined(CONFIG_WATCHDOG)
116/* Called by macro WATCHDOG_RESET */
117void watchdog_reset(void)
118{
Alison Wangaa0d99f2012-03-26 21:49:05 +0000119 wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
TsiChung Liew8e585f02007-06-18 13:50:13 -0500120
Alison Wangaa0d99f2012-03-26 21:49:05 +0000121 /* Count register */
122 out_be16(&wdp->sr, 0x5555);
123 out_be16(&wdp->sr, 0xaaaa);
TsiChung Liew8e585f02007-06-18 13:50:13 -0500124}
125
126int watchdog_disable(void)
127{
Alison Wangaa0d99f2012-03-26 21:49:05 +0000128 wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
TsiChung Liew8e585f02007-06-18 13:50:13 -0500129
130 /* UserManual, once the wdog is disabled, wdog cannot be re-enabled */
Alison Wangaa0d99f2012-03-26 21:49:05 +0000131 /* halted watchdog timer */
132 setbits_be16(&wdp->cr, WTM_WCR_HALTED);
TsiChung Liew8e585f02007-06-18 13:50:13 -0500133
134 puts("WATCHDOG:disabled\n");
135 return (0);
136}
137
138int watchdog_init(void)
139{
Alison Wangaa0d99f2012-03-26 21:49:05 +0000140 wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
TsiChung Liew8e585f02007-06-18 13:50:13 -0500141 u32 wdog_module = 0;
142
143 /* set timeout and enable watchdog */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200144 wdog_module = ((CONFIG_SYS_CLK / 1000) * CONFIG_WATCHDOG_TIMEOUT);
TsiChungLiewaa5f1f92008-01-14 17:23:08 -0600145#ifdef CONFIG_M5329
Alison Wangaa0d99f2012-03-26 21:49:05 +0000146 out_be16(&wdp->mr, wdog_module / 8192);
TsiChungLiewaa5f1f92008-01-14 17:23:08 -0600147#else
Alison Wangaa0d99f2012-03-26 21:49:05 +0000148 out_be16(&wdp->mr, wdog_module / 4096);
TsiChungLiewaa5f1f92008-01-14 17:23:08 -0600149#endif
TsiChung Liew8e585f02007-06-18 13:50:13 -0500150
Alison Wangaa0d99f2012-03-26 21:49:05 +0000151 out_be16(&wdp->cr, WTM_WCR_EN);
TsiChung Liew8e585f02007-06-18 13:50:13 -0500152 puts("WATCHDOG:enabled\n");
153
154 return (0);
155}
TsiChungLiew7a17e752007-07-05 23:01:22 -0500156#endif /* CONFIG_WATCHDOG */
Ben Warren86882b82008-08-26 22:16:25 -0700157
158#if defined(CONFIG_MCFFEC)
159/* Default initializations for MCFFEC controllers. To override,
160 * create a board-specific function called:
161 * int board_eth_init(bd_t *bis)
162 */
163
Ben Warren86882b82008-08-26 22:16:25 -0700164int cpu_eth_init(bd_t *bis)
165{
166 return mcffec_initialize(bis);
167}
168#endif