blob: 3224f009a67d883fe4632114d318ea74b6e72877 [file] [log] [blame]
wdenk324f6cf2002-10-07 21:13:39 +00001/*
2 * (C) Copyright 2002
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
wdenk228f29a2002-12-08 09:53:23 +000022 *
23 * Be sure to mark tests to be run before relocation as such with the
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020024 * CONFIG_SYS_POST_PREREL flag so that logging is done correctly if the
wdenk228f29a2002-12-08 09:53:23 +000025 * logbuffer support is enabled.
wdenk324f6cf2002-10-07 21:13:39 +000026 */
27
28#include <common.h>
29
wdenk324f6cf2002-10-07 21:13:39 +000030#include <post.h>
31
Yuri Tikhonov6e8ec682008-05-08 15:42:47 +020032extern int ocm_post_test (int flags);
wdenk324f6cf2002-10-07 21:13:39 +000033extern int cache_post_test (int flags);
34extern int watchdog_post_test (int flags);
35extern int i2c_post_test (int flags);
36extern int rtc_post_test (int flags);
37extern int memory_post_test (int flags);
38extern int cpu_post_test (int flags);
Igor Lisitsina11e0692007-03-28 19:06:19 +040039extern int fpu_post_test (int flags);
wdenk324f6cf2002-10-07 21:13:39 +000040extern int uart_post_test (int flags);
41extern int ether_post_test (int flags);
42extern int spi_post_test (int flags);
43extern int usb_post_test (int flags);
44extern int spr_post_test (int flags);
wdenk4532cb62003-04-27 22:52:51 +000045extern int sysmon_post_test (int flags);
wdenk5a8c51c2004-04-15 21:16:42 +000046extern int dsp_post_test (int flags);
wdenk79fa88f2004-06-07 23:46:25 +000047extern int codec_post_test (int flags);
Pavel Kolesnikov531e3e82007-07-20 15:03:03 +020048extern int ecc_post_test (int flags);
wdenk4532cb62003-04-27 22:52:51 +000049
Yuri Tikhonov65b20dc2008-02-04 14:10:42 +010050extern int dspic_init_post_test (int flags);
51extern int dspic_post_test (int flags);
52extern int gdc_post_test (int flags);
53extern int fpga_post_test (int flags);
54extern int lwmon5_watchdog_post_test(int flags);
55extern int sysmon1_post_test(int flags);
56
wdenk4532cb62003-04-27 22:52:51 +000057extern int sysmon_init_f (void);
58
59extern void sysmon_reloc (void);
60
wdenk324f6cf2002-10-07 21:13:39 +000061
62struct post_test post_list[] =
63{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020064#if CONFIG_POST & CONFIG_SYS_POST_OCM
Yuri Tikhonov6e8ec682008-05-08 15:42:47 +020065 {
66 "OCM test",
67 "ocm",
68 "This test checks on chip memory (OCM).",
Yuri Tikhonov7845d492008-05-08 15:46:02 +020069 POST_ROM | POST_ALWAYS | POST_PREREL | POST_CRITICAL | POST_STOP,
Yuri Tikhonov6e8ec682008-05-08 15:42:47 +020070 &ocm_post_test,
71 NULL,
72 NULL,
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020073 CONFIG_SYS_POST_OCM
Yuri Tikhonov6e8ec682008-05-08 15:42:47 +020074 },
75#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020076#if CONFIG_POST & CONFIG_SYS_POST_CACHE
wdenk324f6cf2002-10-07 21:13:39 +000077 {
wdenk8bde7f72003-06-27 21:31:46 +000078 "Cache test",
79 "cache",
80 "This test verifies the CPU cache operation.",
81 POST_RAM | POST_ALWAYS,
82 &cache_post_test,
83 NULL,
84 NULL,
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020085 CONFIG_SYS_POST_CACHE
wdenk324f6cf2002-10-07 21:13:39 +000086 },
87#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020088#if CONFIG_POST & CONFIG_SYS_POST_WATCHDOG
Yuri Tikhonov65b20dc2008-02-04 14:10:42 +010089#if defined(CONFIG_POST_WATCHDOG)
90 CONFIG_POST_WATCHDOG,
91#else
wdenk324f6cf2002-10-07 21:13:39 +000092 {
wdenk8bde7f72003-06-27 21:31:46 +000093 "Watchdog timer test",
94 "watchdog",
95 "This test checks the watchdog timer.",
wdenk8564acf2003-07-14 22:13:32 +000096 POST_RAM | POST_POWERON | POST_SLOWTEST | POST_MANUAL | POST_REBOOT,
wdenk8bde7f72003-06-27 21:31:46 +000097 &watchdog_post_test,
98 NULL,
99 NULL,
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200100 CONFIG_SYS_POST_WATCHDOG
wdenk324f6cf2002-10-07 21:13:39 +0000101 },
102#endif
Yuri Tikhonov65b20dc2008-02-04 14:10:42 +0100103#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200104#if CONFIG_POST & CONFIG_SYS_POST_I2C
wdenk324f6cf2002-10-07 21:13:39 +0000105 {
wdenk8bde7f72003-06-27 21:31:46 +0000106 "I2C test",
107 "i2c",
108 "This test verifies the I2C operation.",
109 POST_RAM | POST_ALWAYS,
110 &i2c_post_test,
111 NULL,
112 NULL,
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200113 CONFIG_SYS_POST_I2C
wdenk324f6cf2002-10-07 21:13:39 +0000114 },
115#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200116#if CONFIG_POST & CONFIG_SYS_POST_RTC
wdenk324f6cf2002-10-07 21:13:39 +0000117 {
wdenk8bde7f72003-06-27 21:31:46 +0000118 "RTC test",
119 "rtc",
120 "This test verifies the RTC operation.",
wdenk8564acf2003-07-14 22:13:32 +0000121 POST_RAM | POST_SLOWTEST | POST_MANUAL,
wdenk8bde7f72003-06-27 21:31:46 +0000122 &rtc_post_test,
123 NULL,
124 NULL,
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200125 CONFIG_SYS_POST_RTC
wdenk324f6cf2002-10-07 21:13:39 +0000126 },
127#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200128#if CONFIG_POST & CONFIG_SYS_POST_MEMORY
wdenk324f6cf2002-10-07 21:13:39 +0000129 {
wdenk8bde7f72003-06-27 21:31:46 +0000130 "Memory test",
131 "memory",
132 "This test checks RAM.",
wdenk8564acf2003-07-14 22:13:32 +0000133 POST_ROM | POST_POWERON | POST_SLOWTEST | POST_PREREL,
wdenk8bde7f72003-06-27 21:31:46 +0000134 &memory_post_test,
135 NULL,
136 NULL,
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200137 CONFIG_SYS_POST_MEMORY
wdenk324f6cf2002-10-07 21:13:39 +0000138 },
139#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200140#if CONFIG_POST & CONFIG_SYS_POST_CPU
wdenk324f6cf2002-10-07 21:13:39 +0000141 {
wdenk8bde7f72003-06-27 21:31:46 +0000142 "CPU test",
143 "cpu",
144 "This test verifies the arithmetic logic unit of"
145 " CPU.",
146 POST_RAM | POST_ALWAYS,
147 &cpu_post_test,
148 NULL,
149 NULL,
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200150 CONFIG_SYS_POST_CPU
wdenk324f6cf2002-10-07 21:13:39 +0000151 },
152#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200153#if CONFIG_POST & CONFIG_SYS_POST_FPU
Igor Lisitsina11e0692007-03-28 19:06:19 +0400154 {
155 "FPU test",
156 "fpu",
157 "This test verifies the arithmetic logic unit of"
158 " FPU.",
159 POST_RAM | POST_ALWAYS,
160 &fpu_post_test,
161 NULL,
162 NULL,
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200163 CONFIG_SYS_POST_FPU
Igor Lisitsina11e0692007-03-28 19:06:19 +0400164 },
165#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200166#if CONFIG_POST & CONFIG_SYS_POST_UART
wdenk324f6cf2002-10-07 21:13:39 +0000167 {
wdenk8bde7f72003-06-27 21:31:46 +0000168 "UART test",
169 "uart",
170 "This test verifies the UART operation.",
wdenk8564acf2003-07-14 22:13:32 +0000171 POST_RAM | POST_SLOWTEST | POST_MANUAL,
wdenk8bde7f72003-06-27 21:31:46 +0000172 &uart_post_test,
173 NULL,
174 NULL,
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200175 CONFIG_SYS_POST_UART
wdenk324f6cf2002-10-07 21:13:39 +0000176 },
177#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200178#if CONFIG_POST & CONFIG_SYS_POST_ETHER
wdenk324f6cf2002-10-07 21:13:39 +0000179 {
wdenk8bde7f72003-06-27 21:31:46 +0000180 "ETHERNET test",
181 "ethernet",
182 "This test verifies the ETHERNET operation.",
183 POST_RAM | POST_ALWAYS | POST_MANUAL,
184 &ether_post_test,
185 NULL,
186 NULL,
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200187 CONFIG_SYS_POST_ETHER
wdenk324f6cf2002-10-07 21:13:39 +0000188 },
189#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200190#if CONFIG_POST & CONFIG_SYS_POST_SPI
wdenk324f6cf2002-10-07 21:13:39 +0000191 {
wdenk8bde7f72003-06-27 21:31:46 +0000192 "SPI test",
193 "spi",
194 "This test verifies the SPI operation.",
195 POST_RAM | POST_ALWAYS | POST_MANUAL,
196 &spi_post_test,
197 NULL,
198 NULL,
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200199 CONFIG_SYS_POST_SPI
wdenk324f6cf2002-10-07 21:13:39 +0000200 },
201#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200202#if CONFIG_POST & CONFIG_SYS_POST_USB
wdenk324f6cf2002-10-07 21:13:39 +0000203 {
wdenk8bde7f72003-06-27 21:31:46 +0000204 "USB test",
205 "usb",
206 "This test verifies the USB operation.",
207 POST_RAM | POST_ALWAYS | POST_MANUAL,
208 &usb_post_test,
209 NULL,
210 NULL,
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200211 CONFIG_SYS_POST_USB
wdenk324f6cf2002-10-07 21:13:39 +0000212 },
213#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200214#if CONFIG_POST & CONFIG_SYS_POST_SPR
wdenk324f6cf2002-10-07 21:13:39 +0000215 {
wdenk8bde7f72003-06-27 21:31:46 +0000216 "SPR test",
217 "spr",
218 "This test checks SPR contents.",
Stefan Roeseb2e21422008-01-09 10:38:58 +0100219 POST_RAM | POST_ALWAYS,
wdenk8bde7f72003-06-27 21:31:46 +0000220 &spr_post_test,
221 NULL,
222 NULL,
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200223 CONFIG_SYS_POST_SPR
wdenk324f6cf2002-10-07 21:13:39 +0000224 },
225#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200226#if CONFIG_POST & CONFIG_SYS_POST_SYSMON
wdenk4532cb62003-04-27 22:52:51 +0000227 {
wdenk8bde7f72003-06-27 21:31:46 +0000228 "SYSMON test",
229 "sysmon",
230 "This test monitors system hardware.",
231 POST_RAM | POST_ALWAYS,
232 &sysmon_post_test,
233 &sysmon_init_f,
234 &sysmon_reloc,
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200235 CONFIG_SYS_POST_SYSMON
wdenk4532cb62003-04-27 22:52:51 +0000236 },
237#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200238#if CONFIG_POST & CONFIG_SYS_POST_DSP
wdenk5a8c51c2004-04-15 21:16:42 +0000239 {
240 "DSP test",
241 "dsp",
242 "This test checks any connected DSP(s).",
Sascha Laue5744ddc2008-05-30 09:48:14 +0200243 POST_RAM | POST_ALWAYS | POST_MANUAL,
wdenk5a8c51c2004-04-15 21:16:42 +0000244 &dsp_post_test,
245 NULL,
246 NULL,
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200247 CONFIG_SYS_POST_DSP
wdenk5a8c51c2004-04-15 21:16:42 +0000248 },
249#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200250#if CONFIG_POST & CONFIG_SYS_POST_CODEC
wdenk79fa88f2004-06-07 23:46:25 +0000251 {
252 "CODEC test",
253 "codec",
254 "This test checks any connected codec(s).",
255 POST_RAM | POST_MANUAL,
256 &codec_post_test,
257 NULL,
258 NULL,
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200259 CONFIG_SYS_POST_CODEC
wdenk79fa88f2004-06-07 23:46:25 +0000260 },
261#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200262#if CONFIG_POST & CONFIG_SYS_POST_ECC
Pavel Kolesnikov531e3e82007-07-20 15:03:03 +0200263 {
264 "ECC test",
265 "ecc",
Larry Johnson8dafa872008-01-12 23:35:33 -0500266 "This test checks the ECC facility of memory.",
267 POST_ROM | POST_ALWAYS | POST_PREREL,
Pavel Kolesnikov531e3e82007-07-20 15:03:03 +0200268 &ecc_post_test,
269 NULL,
270 NULL,
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200271 CONFIG_SYS_POST_ECC
Pavel Kolesnikov531e3e82007-07-20 15:03:03 +0200272 },
273#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200274#if CONFIG_POST & CONFIG_SYS_POST_BSPEC1
Yuri Tikhonov65b20dc2008-02-04 14:10:42 +0100275 CONFIG_POST_BSPEC1,
276#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200277#if CONFIG_POST & CONFIG_SYS_POST_BSPEC2
Yuri Tikhonov65b20dc2008-02-04 14:10:42 +0100278 CONFIG_POST_BSPEC2,
279#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200280#if CONFIG_POST & CONFIG_SYS_POST_BSPEC3
Yuri Tikhonov65b20dc2008-02-04 14:10:42 +0100281 CONFIG_POST_BSPEC3,
282#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200283#if CONFIG_POST & CONFIG_SYS_POST_BSPEC4
Yuri Tikhonov65b20dc2008-02-04 14:10:42 +0100284 CONFIG_POST_BSPEC4,
285#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200286#if CONFIG_POST & CONFIG_SYS_POST_BSPEC5
Yuri Tikhonov65b20dc2008-02-04 14:10:42 +0100287 CONFIG_POST_BSPEC5,
288#endif
wdenk324f6cf2002-10-07 21:13:39 +0000289};
290
291unsigned int post_list_size = sizeof (post_list) / sizeof (struct post_test);