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Fabio Estevam860b32e2011-05-13 03:15:11 +00001/*
2 * Copyright (C) 2011 Freescale Semiconductor, Inc.
3 *
Fabio Estevamc4c596f2011-09-22 08:07:20 +00004 * Configuration settings for the MX53SMD Freescale board.
Fabio Estevam860b32e2011-05-13 03:15:11 +00005 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +02006 * SPDX-License-Identifier: GPL-2.0+
Fabio Estevam860b32e2011-05-13 03:15:11 +00007 */
8
9#ifndef __CONFIG_H
10#define __CONFIG_H
11
12#define CONFIG_MX53
13
Fabio Estevamc4c596f2011-09-22 08:07:20 +000014#define CONFIG_MACH_TYPE MACH_TYPE_MX53_SMD
15
Fabio Estevam860b32e2011-05-13 03:15:11 +000016#include <asm/arch/imx-regs.h>
17
18#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
Fabio Estevam860b32e2011-05-13 03:15:11 +000019#define CONFIG_SETUP_MEMORY_TAGS
20#define CONFIG_INITRD_TAG
Fabio Estevamfd622f22013-04-24 14:44:26 +000021#define CONFIG_REVISION_TAG
Fabio Estevam860b32e2011-05-13 03:15:11 +000022
Gong Qianyu18fb0e32015-10-26 19:47:42 +080023#define CONFIG_SYS_FSL_CLK
Fabio Estevam5a416df2014-04-22 15:34:57 -030024
Fabio Estevam860b32e2011-05-13 03:15:11 +000025/* Size of malloc() pool */
26#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
27
Fabio Estevam860b32e2011-05-13 03:15:11 +000028#define CONFIG_MXC_GPIO
29
30#define CONFIG_MXC_UART
Stefano Babic40f6fff2011-11-22 15:22:39 +010031#define CONFIG_MXC_UART_BASE UART1_BASE
Fabio Estevam860b32e2011-05-13 03:15:11 +000032
33/* I2C Configs */
tremb089d032013-09-21 18:13:36 +020034#define CONFIG_SYS_I2C
35#define CONFIG_SYS_I2C_MXC
Albert ARIBAUD \\(3ADEV\\)03544c62015-09-21 22:43:38 +020036#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
37#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
York Sunf8cb1012015-03-20 10:20:40 -070038#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
Fabio Estevam860b32e2011-05-13 03:15:11 +000039
40/* MMC Configs */
41#define CONFIG_FSL_ESDHC
42#define CONFIG_SYS_FSL_ESDHC_ADDR 0
43#define CONFIG_SYS_FSL_ESDHC_NUM 1
44
Fabio Estevam860b32e2011-05-13 03:15:11 +000045#define CONFIG_GENERIC_MMC
Fabio Estevam860b32e2011-05-13 03:15:11 +000046#define CONFIG_DOS_PARTITION
47
48/* Eth Configs */
49#define CONFIG_HAS_ETH1
Fabio Estevam860b32e2011-05-13 03:15:11 +000050#define CONFIG_MII
Fabio Estevam860b32e2011-05-13 03:15:11 +000051
52#define CONFIG_FEC_MXC
53#define IMX_FEC_BASE FEC_BASE_ADDR
54#define CONFIG_FEC_MXC_PHYADDR 0x1F
55
Fabio Estevam860b32e2011-05-13 03:15:11 +000056/* allow to overwrite serial and ethaddr */
57#define CONFIG_ENV_OVERWRITE
58#define CONFIG_CONS_INDEX 1
59#define CONFIG_BAUDRATE 115200
Fabio Estevam860b32e2011-05-13 03:15:11 +000060
61/* Command definition */
Fabio Estevam860b32e2011-05-13 03:15:11 +000062
Wolfgang Grandegger28b119e2011-10-17 08:21:56 +000063#define CONFIG_ETHPRIME "FEC0"
Fabio Estevam860b32e2011-05-13 03:15:11 +000064
65#define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */
66#define CONFIG_SYS_TEXT_BASE 0x77800000
67
68#define CONFIG_EXTRA_ENV_SETTINGS \
69 "script=boot.scr\0" \
70 "uimage=uImage\0" \
71 "mmcdev=0\0" \
72 "mmcpart=2\0" \
73 "mmcroot=/dev/mmcblk0p3 rw\0" \
74 "mmcrootfstype=ext3 rootwait\0" \
75 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \
76 "root=${mmcroot} " \
77 "rootfstype=${mmcrootfstype}\0" \
78 "loadbootscript=" \
79 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
80 "bootscript=echo Running bootscript from mmc ...; " \
81 "source\0" \
82 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
83 "mmcboot=echo Booting from mmc ...; " \
84 "run mmcargs; " \
85 "bootm\0" \
86 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \
87 "root=/dev/nfs " \
88 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
89 "netboot=echo Booting from net ...; " \
90 "run netargs; " \
91 "dhcp ${uimage}; bootm\0" \
92
93#define CONFIG_BOOTCOMMAND \
Andrew Bradford66968112012-10-01 05:06:52 +000094 "mmc dev ${mmcdev}; if mmc rescan; then " \
Fabio Estevam860b32e2011-05-13 03:15:11 +000095 "if run loadbootscript; then " \
96 "run bootscript; " \
97 "else " \
98 "if run loaduimage; then " \
99 "run mmcboot; " \
100 "else run netboot; " \
101 "fi; " \
102 "fi; " \
103 "else run netboot; fi"
104#define CONFIG_ARP_TIMEOUT 200UL
105
106/* Miscellaneous configurable options */
107#define CONFIG_SYS_LONGHELP /* undef to save memory */
Fabio Estevam860b32e2011-05-13 03:15:11 +0000108#define CONFIG_AUTO_COMPLETE
109#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
110
111/* Print Buffer Size */
112#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
113#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
114#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
115
116#define CONFIG_SYS_MEMTEST_START 0x70000000
Fabio Estevam869aed72012-02-09 14:25:10 +0000117#define CONFIG_SYS_MEMTEST_END 0x70010000
Fabio Estevam860b32e2011-05-13 03:15:11 +0000118
119#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
120
Fabio Estevam860b32e2011-05-13 03:15:11 +0000121#define CONFIG_CMDLINE_EDITING
122
Fabio Estevam860b32e2011-05-13 03:15:11 +0000123/* Physical Memory Map */
124#define CONFIG_NR_DRAM_BANKS 2
125#define PHYS_SDRAM_1 CSD0_BASE_ADDR
126#define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
127#define PHYS_SDRAM_2 CSD1_BASE_ADDR
128#define PHYS_SDRAM_2_SIZE (512 * 1024 * 1024)
129#define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE)
130
131#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
132#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
133#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
134
135#define CONFIG_SYS_INIT_SP_OFFSET \
136 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
137#define CONFIG_SYS_INIT_SP_ADDR \
138 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
139
140/* FLASH and environment organization */
141#define CONFIG_SYS_NO_FLASH
142
143#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
144#define CONFIG_ENV_SIZE (8 * 1024)
145#define CONFIG_ENV_IS_IN_MMC
146#define CONFIG_SYS_MMC_ENV_DEV 0
147
Fabio Estevam860b32e2011-05-13 03:15:11 +0000148#endif /* __CONFIG_H */