| wdenk | 024a26b | 2002-08-21 21:35:08 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2002 |
| 3 | * Rich Ireland, Enterasys Networks, rireland@enterasys.com. |
| 4 | * |
| 5 | * See file CREDITS for list of people who contributed to this |
| 6 | * project. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | * |
| 23 | */ |
| 24 | |
| 25 | #include <linux/types.h> /* for ulong typedef */ |
| 26 | |
| 27 | #ifndef _FPGA_H_ |
| 28 | #define _FPGA_H_ |
| 29 | |
| 30 | #ifndef CONFIG_MAX_FPGA_DEVICES |
| 31 | #define CONFIG_MAX_FPGA_DEVICES 5 |
| 32 | #endif |
| 33 | |
| 34 | /* these probably belong somewhere else */ |
| 35 | #ifndef FALSE |
| 36 | #define FALSE (0) |
| 37 | #endif |
| 38 | #ifndef TRUE |
| 39 | #define TRUE (!FALSE) |
| 40 | #endif |
| 41 | |
| 42 | /* CONFIG_FPGA bit assignments */ |
| 43 | #define CFG_FPGA_MAN(x) (x) |
| 44 | #define CFG_FPGA_DEV(x) ((x) << 8 ) |
| 45 | #define CFG_FPGA_IF(x) ((x) << 16 ) |
| 46 | |
| 47 | /* FPGA Manufacturer bits in CONFIG_FPGA */ |
| 48 | #define CFG_FPGA_XILINX CFG_FPGA_MAN( 0x1 ) |
| 49 | #define CFG_FPGA_ALTERA CFG_FPGA_MAN( 0x2 ) |
| 50 | |
| 51 | |
| 52 | /* fpga_xxxx function return value definitions */ |
| 53 | #define FPGA_SUCCESS 0 |
| 54 | #define FPGA_FAIL -1 |
| 55 | |
| 56 | /* device numbers must be non-negative */ |
| 57 | #define FPGA_INVALID_DEVICE -1 |
| 58 | |
| 59 | /* root data type defintions */ |
| 60 | typedef enum { /* typedef fpga_type */ |
| 61 | fpga_min_type, /* range check value */ |
| 62 | fpga_xilinx, /* Xilinx Family) */ |
| 63 | fpga_altera, /* unimplemented */ |
| 64 | fpga_undefined /* invalid range check value */ |
| 65 | } fpga_type; /* end, typedef fpga_type */ |
| 66 | |
| 67 | typedef struct { /* typedef fpga_desc */ |
| 68 | fpga_type devtype; /* switch value to select sub-functions */ |
| 69 | void * devdesc; /* real device descriptor */ |
| 70 | } fpga_desc; /* end, typedef fpga_desc */ |
| 71 | |
| 72 | |
| 73 | /* root function definitions */ |
| 74 | extern void fpga_init( ulong reloc_off ); |
| 75 | extern int fpga_add( fpga_type devtype, void *desc ); |
| 76 | extern const int fpga_count( void ); |
| 77 | extern int fpga_load( int devnum, void *buf, size_t bsize ); |
| 78 | extern int fpga_dump( int devnum, void *buf, size_t bsize ); |
| 79 | extern int fpga_info( int devnum ); |
| 80 | |
| 81 | #endif /* _FPGA_H_ */ |