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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / 46263f2de4e01ff0b2e4247c2fa76d24027efd65 / . / arch / powerpc / include / asm / config.h
blob: 3c17c99146427b167577ff1d987d98c9aad1c9c5 [file] [log] [blame]
Kumar Gala47d41cc2009-02-05 20:40:57 -0600[diff] [blame]1/*
Poonam Aggrwalb8cdd012011-01-13 21:39:27 +0530[diff] [blame]2 * Copyright 2009-2011 Freescale Semiconductor, Inc.
Kumar Gala47d41cc2009-02-05 20:40:57 -0600[diff] [blame]3 *
Wolfgang Denk1a459662013-07-08 09:37:19 +0200[diff] [blame]4 * SPDX-License-Identifier: GPL-2.0+
Kumar Gala47d41cc2009-02-05 20:40:57 -0600[diff] [blame]5 */
6
7#ifndef _ASM_CONFIG_H_
8#define _ASM_CONFIG_H_
9
Kumar Gala243be8e2011-01-19 03:05:26 -0600[diff] [blame]10#ifdef CONFIG_MPC85xx
11#include <asm/config_mpc85xx.h>
12#endif
13
14#ifdef CONFIG_MPC86xx
15#include <asm/config_mpc86xx.h>
16#endif
17
York Sun7ac3cc22012-08-17 09:00:54 +0000[diff] [blame]18#ifndef HWCONFIG_BUFFER_SIZE
19 #define HWCONFIG_BUFFER_SIZE 256
20#endif
21
Mingkai Hu273feaf2011-04-26 16:31:16 +0800[diff] [blame]22/* CONFIG_HARD_SPI triggers SPI bus initialization in PowerPC */
23#if defined(CONFIG_MPC8XXX_SPI) || defined(CONFIG_FSL_ESPI)
24# ifndef CONFIG_HARD_SPI
25# define CONFIG_HARD_SPI
26# endif
27#endif
28
Mike Frysingera16028d2009-11-03 11:35:59 -0500[diff] [blame]29#define CONFIG_LMB
John Rigbyfca43cc2010-10-13 13:57:35 -0600[diff] [blame]30#define CONFIG_SYS_BOOT_RAMDISK_HIGH
31#define CONFIG_SYS_BOOT_GET_CMDLINE
32#define CONFIG_SYS_BOOT_GET_KBD
Mike Frysingera16028d2009-11-03 11:35:59 -0500[diff] [blame]33
Kumar Gala87c90632009-02-05 20:40:58 -0600[diff] [blame]34#ifndef CONFIG_MAX_MEM_MAPPED
York Sund29d17d2011-08-26 11:32:44 -0700[diff] [blame]35#if defined(CONFIG_4xx) || \
36 defined(CONFIG_E500) || \
37 defined(CONFIG_MPC86xx) || \
38 defined(CONFIG_E300)
Kumar Gala87c90632009-02-05 20:40:58 -0600[diff] [blame]39#define CONFIG_MAX_MEM_MAPPED ((phys_size_t)2 << 30)
40#else
Stefan Roese2ede8792009-02-11 09:37:12 +0100[diff] [blame]41#define CONFIG_MAX_MEM_MAPPED (256 << 20)
Kumar Gala87c90632009-02-05 20:40:58 -0600[diff] [blame]42#endif
43#endif
44
Peter Tyserf732a752009-07-15 00:01:08 -0500[diff] [blame]45/* Check if boards need to enable FSL DMA engine for SDRAM init */
46#if !defined(CONFIG_FSL_DMA) && defined(CONFIG_DDR_ECC)
47#if (defined(CONFIG_MPC83xx) && defined(CONFIG_DDR_ECC_INIT_VIA_DMA)) || \
48 ((defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)) && \
49 !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER))
Peter Tyser017f11f2009-06-30 17:15:40 -0500[diff] [blame]50#define CONFIG_FSL_DMA
Kumar Gala47d41cc2009-02-05 20:40:57 -0600[diff] [blame]51#endif
Peter Tyser017f11f2009-06-30 17:15:40 -0500[diff] [blame]52#endif
53
Kumar Gala243be8e2011-01-19 03:05:26 -0600[diff] [blame]54#ifndef CONFIG_MAX_CPUS
Kumar Gala7e4259b2009-03-19 02:39:17 -0500[diff] [blame]55#define CONFIG_MAX_CPUS 1
Poonam Aggrwal0e870982009-07-31 12:08:14 +0530[diff] [blame]56#endif
57
Peter Tyser5ccd29c2009-10-23 15:55:47 -0500[diff] [blame]58/*
59 * Provide a default boot page translation virtual address that lines up with
60 * Freescale's default e500 reset page.
61 */
62#if (defined(CONFIG_E500) && defined(CONFIG_MP))
63#ifndef CONFIG_BPTR_VIRT_ADDR
64#define CONFIG_BPTR_VIRT_ADDR 0xfffff000
65#endif
66#endif
67
Kim Phillips929a2132010-06-01 12:24:27 -0500[diff] [blame]68/*
69 * SEC (crypto unit) major compatible version determination
70 */
Kumar Gala243be8e2011-01-19 03:05:26 -0600[diff] [blame]71#if defined(CONFIG_MPC83xx)
Kim Phillips929a2132010-06-01 12:24:27 -0500[diff] [blame]72#define CONFIG_SYS_FSL_SEC_COMPAT 2
73#endif
74
Becky Brucef51cdaf2010-06-17 11:37:20 -0500[diff] [blame]75/* Since so many PPC SOCs have a semi-common LBC, define this here */
76#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) || \
77 defined(CONFIG_MPC83xx)
Dipen Dudhatd789b5f2011-01-20 16:29:35 +0530[diff] [blame]78#if !defined(CONFIG_FSL_IFC)
Becky Brucef51cdaf2010-06-17 11:37:20 -0500[diff] [blame]79#define CONFIG_FSL_LBC
80#endif
Dipen Dudhatd789b5f2011-01-20 16:29:35 +0530[diff] [blame]81#endif
Becky Brucef51cdaf2010-06-17 11:37:20 -0500[diff] [blame]82
Andy Fleming063c1262011-04-08 02:10:54 -0500[diff] [blame]83/* The TSEC driver uses the PHYLIB infrastructure */
84#ifndef CONFIG_PHYLIB
85#if defined(CONFIG_TSEC_ENET)
86#define CONFIG_PHYLIB
87
88#include <config_phylib_all_drivers.h>
89#endif /* TSEC_ENET */
90#endif /* !CONFIG_PHYLIB */
91
Kumar Galac916d7c2011-04-13 08:37:44 -0500[diff] [blame]92/* The FMAN driver uses the PHYLIB infrastructure */
93#if defined(CONFIG_FMAN_ENET)
94#define CONFIG_PHYLIB
95#endif
96
Albert Aribaudf2a37fc2010-08-08 05:17:05 +0530[diff] [blame]97/* All PPC boards must swap IDE bytes */
98#define CONFIG_IDE_SWAP_IO
99
Peter Tyser017f11f2009-06-30 17:15:40 -0500[diff] [blame]100#endif /* _ASM_CONFIG_H_ */