blob: 496890021143ee1819f7cef338efa792eabff8a2 [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0
Kever Yangb7aef282017-11-28 16:04:21 +08002/*
3 * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
Kever Yangb7aef282017-11-28 16:04:21 +08004 */
5
6#include <common.h>
7#include <dm.h>
8#include <ram.h>
9#include <syscon.h>
10#include <asm/arch/clock.h>
11#include <asm/arch/grf_rk3128.h>
12#include <asm/arch/sdram_common.h>
13
Kever Yangb7aef282017-11-28 16:04:21 +080014struct dram_info {
15 struct ram_info info;
16 struct rk3128_grf *grf;
17};
18
19static int rk3128_dmc_probe(struct udevice *dev)
20{
21 struct dram_info *priv = dev_get_priv(dev);
22
23 priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
24 debug("%s: grf=%p\n", __func__, priv->grf);
25 priv->info.base = CONFIG_SYS_SDRAM_BASE;
26 priv->info.size = rockchip_sdram_size(
27 (phys_addr_t)&priv->grf->os_reg[1]);
28
29 return 0;
30}
31
32static int rk3128_dmc_get_info(struct udevice *dev, struct ram_info *info)
33{
34 struct dram_info *priv = dev_get_priv(dev);
35
36 *info = priv->info;
37
38 return 0;
39}
40
41static struct ram_ops rk3128_dmc_ops = {
42 .get_info = rk3128_dmc_get_info,
43};
44
45static const struct udevice_id rk3128_dmc_ids[] = {
46 { .compatible = "rockchip,rk3128-dmc" },
47 { }
48};
49
50U_BOOT_DRIVER(dmc_rk3128) = {
51 .name = "rockchip_rk3128_dmc",
52 .id = UCLASS_RAM,
53 .of_match = rk3128_dmc_ids,
54 .ops = &rk3128_dmc_ops,
55 .probe = rk3128_dmc_probe,
56 .priv_auto_alloc_size = sizeof(struct dram_info),
57};