blob: 1d4eeda4e8bb293f7c09056a2f8d1d6789d04c4f [file] [log] [blame]
Paul Burtonad8783c2016-09-08 07:47:39 +01001/dts-v1/;
2
3#include <dt-bindings/clock/boston-clock.h>
4#include <dt-bindings/gpio/gpio.h>
5#include <dt-bindings/interrupt-controller/irq.h>
6#include <dt-bindings/interrupt-controller/mips-gic.h>
7
8/ {
9 #address-cells = <1>;
10 #size-cells = <1>;
11 compatible = "img,boston";
12
13 chosen {
14 stdout-path = &uart0;
15 };
16
17 cpus {
18 #address-cells = <1>;
19 #size-cells = <0>;
20
21 cpu@0 {
22 device_type = "cpu";
23 compatible = "img,mips";
24 reg = <0>;
25 clocks = <&clk_boston BOSTON_CLK_CPU>;
26 };
27 };
28
29 memory@0 {
30 device_type = "memory";
31 reg = <0x00000000 0x10000000>;
32 };
33
34 gic: interrupt-controller {
35 compatible = "mti,gic";
36
37 interrupt-controller;
38 #interrupt-cells = <3>;
39
40 timer {
41 compatible = "mti,gic-timer";
42 interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>;
43 clocks = <&clk_boston BOSTON_CLK_CPU>;
44 };
45 };
46
47 pci0: pci@10000000 {
48 status = "disabled";
49 compatible = "xlnx,axi-pcie-host-1.00.a";
50 device_type = "pci";
51 reg = <0x10000000 0x2000000>;
52
53 #address-cells = <3>;
54 #size-cells = <2>;
55 #interrupt-cells = <1>;
56
57 interrupt-parent = <&gic>;
58 interrupts = <GIC_SHARED 2 IRQ_TYPE_LEVEL_HIGH>;
59
60 ranges = <0x02000000 0 0x40000000
61 0x40000000 0 0x40000000>;
62
63 interrupt-map-mask = <0 0 0 7>;
64 interrupt-map = <0 0 0 1 &pci0_intc 0>,
65 <0 0 0 2 &pci0_intc 1>,
66 <0 0 0 3 &pci0_intc 2>,
67 <0 0 0 4 &pci0_intc 3>;
68
69 pci0_intc: interrupt-controller {
70 interrupt-controller;
71 #address-cells = <0>;
72 #interrupt-cells = <1>;
73 };
74 };
75
76 pci1: pci@12000000 {
77 status = "disabled";
78 compatible = "xlnx,axi-pcie-host-1.00.a";
79 device_type = "pci";
80 reg = <0x12000000 0x2000000>;
81
82 #address-cells = <3>;
83 #size-cells = <2>;
84 #interrupt-cells = <1>;
85
86 interrupt-parent = <&gic>;
87 interrupts = <GIC_SHARED 1 IRQ_TYPE_LEVEL_HIGH>;
88
89 ranges = <0x02000000 0 0x20000000
90 0x20000000 0 0x20000000>;
91
92 interrupt-map-mask = <0 0 0 7>;
93 interrupt-map = <0 0 0 1 &pci1_intc 0>,
94 <0 0 0 2 &pci1_intc 1>,
95 <0 0 0 3 &pci1_intc 2>,
96 <0 0 0 4 &pci1_intc 3>;
97
98 pci1_intc: interrupt-controller {
99 interrupt-controller;
100 #address-cells = <0>;
101 #interrupt-cells = <1>;
102 };
103 };
104
105 pci2: pci@14000000 {
106 compatible = "xlnx,axi-pcie-host-1.00.a";
107 device_type = "pci";
108 reg = <0x14000000 0x2000000>;
109
110 #address-cells = <3>;
111 #size-cells = <2>;
112 #interrupt-cells = <1>;
113
114 interrupt-parent = <&gic>;
115 interrupts = <GIC_SHARED 0 IRQ_TYPE_LEVEL_HIGH>;
116
117 ranges = <0x02000000 0 0x16000000
118 0x16000000 0 0x100000>;
119
120 interrupt-map-mask = <0 0 0 7>;
121 interrupt-map = <0 0 0 1 &pci2_intc 0>,
122 <0 0 0 2 &pci2_intc 1>,
123 <0 0 0 3 &pci2_intc 2>,
124 <0 0 0 4 &pci2_intc 3>;
125
126 pci2_intc: interrupt-controller {
127 interrupt-controller;
128 #address-cells = <0>;
129 #interrupt-cells = <1>;
130 };
131
132 pci2_root@0,0,0 {
133 compatible = "pci10ee,7021";
134 reg = <0x00000000 0 0 0 0>;
135
136 #address-cells = <3>;
137 #size-cells = <2>;
138 #interrupt-cells = <1>;
139
140 eg20t_bridge@1,0,0 {
141 compatible = "pci8086,8800";
142 reg = <0x00010000 0 0 0 0>;
143
144 #address-cells = <3>;
145 #size-cells = <2>;
146 #interrupt-cells = <1>;
147
148 eg20t_mac@2,0,1 {
149 compatible = "pci8086,8802";
150 reg = <0x00020100 0 0 0 0>;
151 phy-reset-gpios = <&eg20t_gpio 6 GPIO_ACTIVE_LOW>;
152 };
153
154 eg20t_gpio: eg20t_gpio@2,0,2 {
155 compatible = "pci8086,8803";
156 reg = <0x00020200 0 0 0 0>;
157
158 gpio-controller;
159 #gpio-cells = <2>;
160 };
161
162 eg20t_i2c@2,12,2 {
163 compatible = "pci8086,8817";
164 reg = <0x00026200 0 0 0 0>;
165
166 #address-cells = <1>;
167 #size-cells = <0>;
168
169 rtc@0x68 {
170 compatible = "st,m41t81s";
171 reg = <0x68>;
172 };
173 };
174 };
175 };
176 };
177
178 plat_regs: system-controller@17ffd000 {
179 compatible = "img,boston-platform-regs", "syscon";
180 reg = <0x17ffd000 0x1000>;
181 u-boot,dm-pre-reloc;
182 };
183
184 clk_boston: clock {
185 compatible = "img,boston-clock";
186 #clock-cells = <1>;
187 regmap = <&plat_regs>;
188 u-boot,dm-pre-reloc;
189 };
190
191 reboot: syscon-reboot {
192 compatible = "syscon-reboot";
193 regmap = <&plat_regs>;
194 offset = <0x10>;
195 mask = <0x10>;
196 };
197
198 uart0: uart@17ffe000 {
199 compatible = "ns16550a";
200 reg = <0x17ffe000 0x1000>;
201 reg-shift = <2>;
202 reg-io-width = <4>;
203
204 interrupt-parent = <&gic>;
205 interrupts = <GIC_SHARED 3 IRQ_TYPE_LEVEL_HIGH>;
206
207 clocks = <&clk_boston BOSTON_CLK_SYS>;
208
209 u-boot,dm-pre-reloc;
210 };
211
212 lcd: lcd@17fff000 {
213 compatible = "img,boston-lcd";
214 reg = <0x17fff000 0x8>;
215 };
216
217 flash@18000000 {
218 compatible = "cfi-flash";
219 reg = <0x18000000 0x8000000>;
220 bank-width = <2>;
221 };
222};