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Tom Rini4549e782018-05-06 18:27:01 -04001// SPDX-License-Identifier: GPL-2.0+ OR X11
Ashish Kumar77697762017-08-31 16:12:55 +05302/*
3 * NXP ls1088a QDS board device tree source
4 *
5 * Copyright 2017 NXP
Ashish Kumar77697762017-08-31 16:12:55 +05306 */
7
8/dts-v1/;
9
10#include "fsl-ls1088a.dtsi"
11
12/ {
13 model = "NXP Layerscape 1088a QDS Board";
14 compatible = "fsl,ls1088a-qds", "fsl,ls1088a";
15 aliases {
16 spi0 = &qspi;
17 spi1 = &dspi;
18 };
19};
20
Ashish Kumarc1c597e2018-02-19 14:16:58 +053021&ifc {
22 #address-cells = <2>;
23 #size-cells = <1>;
24 /* NOR, NAND Flashes and FPGA on board */
25 ranges = <0 0 0x5 0x80000000 0x08000000
26 2 0 0x5 0x30000000 0x00010000
27 3 0 0x5 0x20000000 0x00010000>;
28 status = "okay";
29
30 nor@0,0 {
31 #address-cells = <1>;
32 #size-cells = <1>;
33 compatible = "cfi-flash";
34 reg = <0x0 0x0 0x8000000>;
35 bank-width = <2>;
36 device-width = <1>;
37 };
38
39 nand@2,0 {
40 compatible = "fsl,ifc-nand";
41 #address-cells = <1>;
42 #size-cells = <1>;
43 reg = <0x1 0x0 0x10000>;
44 };
45
46 fpga: board-control@3,0 {
47 #address-cells = <1>;
48 #size-cells = <1>;
49 compatible = "simple-bus", "fsl,ls1088aqds-fpga",
50 "fsl,fpga-qixis";
51 reg = <0x2 0x0 0x0000100>;
52 bank-width = <1>;
53 device-width = <1>;
54 ranges = <0 2 0 0x100>;
55 };
56};
57
Ashish Kumar77697762017-08-31 16:12:55 +053058&dspi {
59 bus-num = <0>;
60 status = "okay";
61
62 dflash0: n25q128a {
63 #address-cells = <1>;
64 #size-cells = <1>;
65 compatible = "spi-flash";
66 reg = <0>;
67 spi-max-frequency = <1000000>; /* input clock */
68 };
69
70 dflash1: sst25wf040b {
71 #address-cells = <1>;
72 #size-cells = <1>;
73 compatible = "spi-flash";
74 spi-max-frequency = <3500000>;
75 reg = <1>;
76 };
77
78 dflash2: en25s64 {
79 #address-cells = <1>;
80 #size-cells = <1>;
81 compatible = "spi-flash";
82 spi-max-frequency = <3500000>;
83 reg = <2>;
84 };
85};
86
87&qspi {
88 bus-num = <0>;
89 status = "okay";
90
91 qflash0: s25fs512s@0 {
92 #address-cells = <1>;
93 #size-cells = <1>;
94 compatible = "spi-flash";
95 spi-max-frequency = <50000000>;
96 reg = <0>;
97 };
98
99 qflash1: s25fs512s@1 {
100 #address-cells = <1>;
101 #size-cells = <1>;
102 compatible = "spi-flash";
103 spi-max-frequency = <50000000>;
104 reg = <1>;
105 };
106};