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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
TsiChungLiew4a442d32007-08-16 19:23:50 -05002/*
3 *
4 * (C) Copyright 2000-2003
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
Alison Wangc6d88632012-03-26 21:49:06 +00007 * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
TsiChungLiew4a442d32007-08-16 19:23:50 -05008 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
TsiChungLiew4a442d32007-08-16 19:23:50 -05009 */
10
11#include <common.h>
12#include <asm/processor.h>
13
14#include <asm/immap.h>
Alison Wangc6d88632012-03-26 21:49:06 +000015#include <asm/io.h>
TsiChungLiew4a442d32007-08-16 19:23:50 -050016
17DECLARE_GLOBAL_DATA_PTR;
18/*
19 * get_clocks() fills in gd->cpu_clock and gd->bus_clk
20 */
21int get_clocks(void)
22{
Alison Wangc6d88632012-03-26 21:49:06 +000023 pll_t *pll = (pll_t *)(MMAP_PLL);
TsiChungLiew4a442d32007-08-16 19:23:50 -050024
Alison Wangc6d88632012-03-26 21:49:06 +000025 out_be32(&pll->syncr, PLL_SYNCR_MFD(1));
TsiChungLiew4a442d32007-08-16 19:23:50 -050026
Alison Wangc6d88632012-03-26 21:49:06 +000027 while (!(in_be32(&pll->synsr) & PLL_SYNSR_LOCK))
28 ;
Stefan Roese8280f6a2007-08-18 14:33:02 +020029
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020030 gd->bus_clk = CONFIG_SYS_CLK;
TsiChungLiew4a442d32007-08-16 19:23:50 -050031 gd->cpu_clk = (gd->bus_clk * 2);
Stefan Roese8280f6a2007-08-18 14:33:02 +020032
Heiko Schocher00f792e2012-10-24 13:48:22 +020033#ifdef CONFIG_SYS_I2C_FSL
Simon Glass609e6ec2012-12-13 20:48:49 +000034 gd->arch.i2c1_clk = gd->bus_clk;
TsiChung Lieweec567a2008-08-19 03:01:19 +060035#endif
36
TsiChungLiew4a442d32007-08-16 19:23:50 -050037 return (0);
38}