blob: 194c84e7e89d1c2515e6dec34ca55283ec9801fe [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
wdenkc6097192002-11-03 00:24:07 +00002/*
3 * (C) Copyright 2001
4 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
wdenkc6097192002-11-03 00:24:07 +00005 */
6
7/*
8 * This provides a bit-banged interface to the ethernet MII management
9 * channel.
10 */
11
12#include <common.h>
Simon Glassc74c8e62015-04-05 16:07:39 -060013#include <dm.h>
Simon Glassf7ae49f2020-05-10 11:40:05 -060014#include <log.h>
wdenkc6097192002-11-03 00:24:07 +000015#include <miiphy.h>
Andy Fleming5f184712011-04-08 02:10:27 -050016#include <phy.h>
Simon Glassc05ed002020-05-10 11:40:11 -060017#include <linux/delay.h>
wdenkc6097192002-11-03 00:24:07 +000018
Marian Balakowicz63ff0042005-10-28 22:30:33 +020019#include <asm/types.h>
20#include <linux/list.h>
21#include <malloc.h>
22#include <net.h>
23
24/* local debug macro */
Marian Balakowicz63ff0042005-10-28 22:30:33 +020025#undef MII_DEBUG
26
27#undef debug
28#ifdef MII_DEBUG
Andy Fleming16a53232011-04-07 14:38:35 -050029#define debug(fmt, args...) printf(fmt, ##args)
Marian Balakowicz63ff0042005-10-28 22:30:33 +020030#else
Andy Fleming16a53232011-04-07 14:38:35 -050031#define debug(fmt, args...)
Marian Balakowicz63ff0042005-10-28 22:30:33 +020032#endif /* MII_DEBUG */
33
Marian Balakowicz63ff0042005-10-28 22:30:33 +020034static struct list_head mii_devs;
35static struct mii_dev *current_mii;
36
Mike Frysinger0daac972010-07-27 18:35:09 -040037/*
38 * Lookup the mii_dev struct by the registered device name.
39 */
Andy Fleming5f184712011-04-08 02:10:27 -050040struct mii_dev *miiphy_get_dev_by_name(const char *devname)
Mike Frysinger0daac972010-07-27 18:35:09 -040041{
42 struct list_head *entry;
43 struct mii_dev *dev;
44
45 if (!devname) {
46 printf("NULL device name!\n");
47 return NULL;
48 }
49
50 list_for_each(entry, &mii_devs) {
51 dev = list_entry(entry, struct mii_dev, link);
52 if (strcmp(dev->name, devname) == 0)
53 return dev;
54 }
55
Mike Frysinger0daac972010-07-27 18:35:09 -040056 return NULL;
57}
58
Marian Balakowicz63ff0042005-10-28 22:30:33 +020059/*****************************************************************************
60 *
Marian Balakowiczd9785c12005-11-30 18:06:04 +010061 * Initialize global data. Need to be called before any other miiphy routine.
62 */
Mike Frysinger5700bb62010-07-27 18:35:08 -040063void miiphy_init(void)
Marian Balakowiczd9785c12005-11-30 18:06:04 +010064{
Andy Fleming16a53232011-04-07 14:38:35 -050065 INIT_LIST_HEAD(&mii_devs);
Larry Johnson298035d2007-10-31 11:21:29 -050066 current_mii = NULL;
Marian Balakowiczd9785c12005-11-30 18:06:04 +010067}
68
Andy Fleming5f184712011-04-08 02:10:27 -050069struct mii_dev *mdio_alloc(void)
70{
71 struct mii_dev *bus;
72
73 bus = malloc(sizeof(*bus));
74 if (!bus)
75 return bus;
76
77 memset(bus, 0, sizeof(*bus));
78
79 /* initalize mii_dev struct fields */
80 INIT_LIST_HEAD(&bus->link);
81
82 return bus;
83}
84
Bin Mengcb6baca2015-10-07 21:32:37 -070085void mdio_free(struct mii_dev *bus)
86{
87 free(bus);
88}
89
Andy Fleming5f184712011-04-08 02:10:27 -050090int mdio_register(struct mii_dev *bus)
91{
Peng Fand39449b2015-11-24 17:03:47 +080092 if (!bus || !bus->read || !bus->write)
Andy Fleming5f184712011-04-08 02:10:27 -050093 return -1;
94
95 /* check if we have unique name */
96 if (miiphy_get_dev_by_name(bus->name)) {
97 printf("mdio_register: non unique device name '%s'\n",
98 bus->name);
99 return -1;
100 }
101
102 /* add it to the list */
103 list_add_tail(&bus->link, &mii_devs);
104
105 if (!current_mii)
106 current_mii = bus;
107
108 return 0;
109}
110
Michal Simek79e2a6a2016-12-08 10:06:26 +0100111int mdio_register_seq(struct mii_dev *bus, int seq)
112{
113 int ret;
114
115 /* Setup a unique name for each mdio bus */
116 ret = snprintf(bus->name, MDIO_NAME_LEN, "eth%d", seq);
117 if (ret < 0)
118 return ret;
119
120 return mdio_register(bus);
121}
122
Bin Mengcb6baca2015-10-07 21:32:37 -0700123int mdio_unregister(struct mii_dev *bus)
124{
125 if (!bus)
126 return 0;
127
128 /* delete it from the list */
129 list_del(&bus->link);
130
131 if (current_mii == bus)
132 current_mii = NULL;
133
134 return 0;
135}
136
Andy Fleming5f184712011-04-08 02:10:27 -0500137void mdio_list_devices(void)
138{
139 struct list_head *entry;
140
141 list_for_each(entry, &mii_devs) {
142 int i;
143 struct mii_dev *bus = list_entry(entry, struct mii_dev, link);
144
145 printf("%s:\n", bus->name);
146
147 for (i = 0; i < PHY_MAX_ADDR; i++) {
148 struct phy_device *phydev = bus->phymap[i];
149
150 if (phydev) {
Michal Simek15a2acd2016-11-16 08:41:01 +0100151 printf("%x - %s", i, phydev->drv->name);
Andy Fleming5f184712011-04-08 02:10:27 -0500152
153 if (phydev->dev)
154 printf(" <--> %s\n", phydev->dev->name);
155 else
156 printf("\n");
157 }
158 }
159 }
160}
161
Mike Frysinger5700bb62010-07-27 18:35:08 -0400162int miiphy_set_current_dev(const char *devname)
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200163{
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200164 struct mii_dev *dev;
165
Andy Fleming5f184712011-04-08 02:10:27 -0500166 dev = miiphy_get_dev_by_name(devname);
Mike Frysinger0daac972010-07-27 18:35:09 -0400167 if (dev) {
168 current_mii = dev;
169 return 0;
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200170 }
171
Andy Fleming5f184712011-04-08 02:10:27 -0500172 printf("No such device: %s\n", devname);
173
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200174 return 1;
175}
176
Andy Fleming5f184712011-04-08 02:10:27 -0500177struct mii_dev *mdio_get_current_dev(void)
178{
179 return current_mii;
180}
181
Pankaj Bansal9215bb12018-09-18 15:46:48 +0530182struct list_head *mdio_get_list_head(void)
183{
184 return &mii_devs;
185}
186
Andy Fleming5f184712011-04-08 02:10:27 -0500187struct phy_device *mdio_phydev_for_ethname(const char *ethname)
188{
189 struct list_head *entry;
190 struct mii_dev *bus;
191
192 list_for_each(entry, &mii_devs) {
193 int i;
194 bus = list_entry(entry, struct mii_dev, link);
195
196 for (i = 0; i < PHY_MAX_ADDR; i++) {
197 if (!bus->phymap[i] || !bus->phymap[i]->dev)
198 continue;
199
200 if (strcmp(bus->phymap[i]->dev->name, ethname) == 0)
201 return bus->phymap[i];
202 }
203 }
204
205 printf("%s is not a known ethernet\n", ethname);
206 return NULL;
207}
208
Mike Frysinger5700bb62010-07-27 18:35:08 -0400209const char *miiphy_get_current_dev(void)
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200210{
211 if (current_mii)
212 return current_mii->name;
213
214 return NULL;
215}
216
Mike Frysingerede16ea2010-07-27 18:35:10 -0400217static struct mii_dev *miiphy_get_active_dev(const char *devname)
218{
219 /* If the current mii is the one we want, return it */
220 if (current_mii)
221 if (strcmp(current_mii->name, devname) == 0)
222 return current_mii;
223
224 /* Otherwise, set the active one to the one we want */
225 if (miiphy_set_current_dev(devname))
226 return NULL;
227 else
228 return current_mii;
229}
230
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200231/*****************************************************************************
232 *
233 * Read to variable <value> from the PHY attached to device <devname>,
234 * use PHY address <addr> and register <reg>.
235 *
Andy Fleming1cdabc42011-10-31 09:46:13 -0500236 * This API is deprecated. Use phy_read on a phy_device found via phy_connect
237 *
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200238 * Returns:
239 * 0 on success
240 */
Wolfgang Denkf915c932011-12-07 08:35:14 +0100241int miiphy_read(const char *devname, unsigned char addr, unsigned char reg,
Larry Johnson298035d2007-10-31 11:21:29 -0500242 unsigned short *value)
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200243{
Andy Fleming5f184712011-04-08 02:10:27 -0500244 struct mii_dev *bus;
Anatolij Gustschind67d5d52011-04-30 02:17:44 +0000245 int ret;
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200246
Andy Fleming5f184712011-04-08 02:10:27 -0500247 bus = miiphy_get_active_dev(devname);
Anatolij Gustschind67d5d52011-04-30 02:17:44 +0000248 if (!bus)
Andy Fleming5f184712011-04-08 02:10:27 -0500249 return 1;
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200250
Anatolij Gustschind67d5d52011-04-30 02:17:44 +0000251 ret = bus->read(bus, addr, MDIO_DEVAD_NONE, reg);
252 if (ret < 0)
253 return 1;
254
255 *value = (unsigned short)ret;
256 return 0;
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200257}
258
259/*****************************************************************************
260 *
261 * Write <value> to the PHY attached to device <devname>,
262 * use PHY address <addr> and register <reg>.
263 *
Andy Fleming1cdabc42011-10-31 09:46:13 -0500264 * This API is deprecated. Use phy_write on a phy_device found by phy_connect
265 *
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200266 * Returns:
267 * 0 on success
268 */
Wolfgang Denkf915c932011-12-07 08:35:14 +0100269int miiphy_write(const char *devname, unsigned char addr, unsigned char reg,
Larry Johnson298035d2007-10-31 11:21:29 -0500270 unsigned short value)
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200271{
Andy Fleming5f184712011-04-08 02:10:27 -0500272 struct mii_dev *bus;
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200273
Andy Fleming5f184712011-04-08 02:10:27 -0500274 bus = miiphy_get_active_dev(devname);
275 if (bus)
276 return bus->write(bus, addr, MDIO_DEVAD_NONE, reg, value);
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200277
Mike Frysinger0daac972010-07-27 18:35:09 -0400278 return 1;
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200279}
280
281/*****************************************************************************
282 *
283 * Print out list of registered MII capable devices.
284 */
Andy Fleming16a53232011-04-07 14:38:35 -0500285void miiphy_listdev(void)
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200286{
287 struct list_head *entry;
288 struct mii_dev *dev;
289
Andy Fleming16a53232011-04-07 14:38:35 -0500290 puts("MII devices: ");
291 list_for_each(entry, &mii_devs) {
292 dev = list_entry(entry, struct mii_dev, link);
293 printf("'%s' ", dev->name);
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200294 }
Andy Fleming16a53232011-04-07 14:38:35 -0500295 puts("\n");
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200296
297 if (current_mii)
Andy Fleming16a53232011-04-07 14:38:35 -0500298 printf("Current device: '%s'\n", current_mii->name);
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200299}
300
wdenkc6097192002-11-03 00:24:07 +0000301/*****************************************************************************
302 *
303 * Read the OUI, manufacture's model number, and revision number.
304 *
305 * OUI: 22 bits (unsigned int)
306 * Model: 6 bits (unsigned char)
307 * Revision: 4 bits (unsigned char)
308 *
Andy Fleming1cdabc42011-10-31 09:46:13 -0500309 * This API is deprecated.
310 *
wdenkc6097192002-11-03 00:24:07 +0000311 * Returns:
312 * 0 on success
313 */
Mike Frysinger5700bb62010-07-27 18:35:08 -0400314int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui,
wdenkc6097192002-11-03 00:24:07 +0000315 unsigned char *model, unsigned char *rev)
316{
317 unsigned int reg = 0;
wdenk8bf3b002003-12-06 23:20:41 +0000318 unsigned short tmp;
wdenkc6097192002-11-03 00:24:07 +0000319
Andy Fleming16a53232011-04-07 14:38:35 -0500320 if (miiphy_read(devname, addr, MII_PHYSID2, &tmp) != 0) {
321 debug("PHY ID register 2 read failed\n");
322 return -1;
wdenkc6097192002-11-03 00:24:07 +0000323 }
wdenk8bf3b002003-12-06 23:20:41 +0000324 reg = tmp;
wdenkc6097192002-11-03 00:24:07 +0000325
Andy Fleming16a53232011-04-07 14:38:35 -0500326 debug("MII_PHYSID2 @ 0x%x = 0x%04x\n", addr, reg);
Shinya Kuribayashi26c7bab2008-01-19 10:25:59 +0900327
wdenkc6097192002-11-03 00:24:07 +0000328 if (reg == 0xFFFF) {
329 /* No physical device present at this address */
Andy Fleming16a53232011-04-07 14:38:35 -0500330 return -1;
wdenkc6097192002-11-03 00:24:07 +0000331 }
332
Andy Fleming16a53232011-04-07 14:38:35 -0500333 if (miiphy_read(devname, addr, MII_PHYSID1, &tmp) != 0) {
334 debug("PHY ID register 1 read failed\n");
335 return -1;
wdenkc6097192002-11-03 00:24:07 +0000336 }
wdenk8bf3b002003-12-06 23:20:41 +0000337 reg |= tmp << 16;
Andy Fleming16a53232011-04-07 14:38:35 -0500338 debug("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg);
Shinya Kuribayashi26c7bab2008-01-19 10:25:59 +0900339
Larry Johnson298035d2007-10-31 11:21:29 -0500340 *oui = (reg >> 10);
341 *model = (unsigned char)((reg >> 4) & 0x0000003F);
342 *rev = (unsigned char)(reg & 0x0000000F);
Andy Fleming16a53232011-04-07 14:38:35 -0500343 return 0;
wdenkc6097192002-11-03 00:24:07 +0000344}
345
Andy Fleming5f184712011-04-08 02:10:27 -0500346#ifndef CONFIG_PHYLIB
wdenkc6097192002-11-03 00:24:07 +0000347/*****************************************************************************
348 *
349 * Reset the PHY.
Andy Fleming1cdabc42011-10-31 09:46:13 -0500350 *
351 * This API is deprecated. Use PHYLIB.
352 *
wdenkc6097192002-11-03 00:24:07 +0000353 * Returns:
354 * 0 on success
355 */
Mike Frysinger5700bb62010-07-27 18:35:08 -0400356int miiphy_reset(const char *devname, unsigned char addr)
wdenkc6097192002-11-03 00:24:07 +0000357{
358 unsigned short reg;
Stefan Roeseab5a0dc2010-02-02 13:43:48 +0100359 int timeout = 500;
wdenkc6097192002-11-03 00:24:07 +0000360
Andy Fleming16a53232011-04-07 14:38:35 -0500361 if (miiphy_read(devname, addr, MII_BMCR, &reg) != 0) {
362 debug("PHY status read failed\n");
363 return -1;
Wolfgang Denkf89920c2005-08-12 23:15:53 +0200364 }
Andy Fleming16a53232011-04-07 14:38:35 -0500365 if (miiphy_write(devname, addr, MII_BMCR, reg | BMCR_RESET) != 0) {
366 debug("PHY reset failed\n");
367 return -1;
wdenkc6097192002-11-03 00:24:07 +0000368 }
Tom Rini16199a82022-03-18 08:38:26 -0400369#if CONFIG_PHY_RESET_DELAY > 0
Andy Fleming16a53232011-04-07 14:38:35 -0500370 udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */
wdenk5653fc32004-02-08 22:55:38 +0000371#endif
wdenkc6097192002-11-03 00:24:07 +0000372 /*
373 * Poll the control register for the reset bit to go to 0 (it is
374 * auto-clearing). This should happen within 0.5 seconds per the
375 * IEEE spec.
376 */
wdenkc6097192002-11-03 00:24:07 +0000377 reg = 0x8000;
Stefan Roeseab5a0dc2010-02-02 13:43:48 +0100378 while (((reg & 0x8000) != 0) && timeout--) {
Mike Frysinger8ef583a2010-12-23 15:40:12 -0500379 if (miiphy_read(devname, addr, MII_BMCR, &reg) != 0) {
Stefan Roeseab5a0dc2010-02-02 13:43:48 +0100380 debug("PHY status read failed\n");
381 return -1;
wdenkc6097192002-11-03 00:24:07 +0000382 }
Stefan Roeseab5a0dc2010-02-02 13:43:48 +0100383 udelay(1000);
wdenkc6097192002-11-03 00:24:07 +0000384 }
385 if ((reg & 0x8000) == 0) {
Andy Fleming16a53232011-04-07 14:38:35 -0500386 return 0;
wdenkc6097192002-11-03 00:24:07 +0000387 } else {
Andy Fleming16a53232011-04-07 14:38:35 -0500388 puts("PHY reset timed out\n");
389 return -1;
wdenkc6097192002-11-03 00:24:07 +0000390 }
Andy Fleming16a53232011-04-07 14:38:35 -0500391 return 0;
wdenkc6097192002-11-03 00:24:07 +0000392}
Andy Fleming5f184712011-04-08 02:10:27 -0500393#endif /* !PHYLIB */
wdenkc6097192002-11-03 00:24:07 +0000394
wdenkc6097192002-11-03 00:24:07 +0000395/*****************************************************************************
396 *
Larry Johnson71bc6e62007-11-01 08:46:50 -0500397 * Determine the ethernet speed (10/100/1000). Return 10 on error.
wdenkc6097192002-11-03 00:24:07 +0000398 */
Mike Frysinger5700bb62010-07-27 18:35:08 -0400399int miiphy_speed(const char *devname, unsigned char addr)
wdenkc6097192002-11-03 00:24:07 +0000400{
Dongpo Li8c83c032016-08-22 21:03:29 +0800401 u16 bmcr, anlpar, adv;
wdenkc6097192002-11-03 00:24:07 +0000402
wdenk6fb6af62004-03-23 23:20:24 +0000403#if defined(CONFIG_PHY_GIGE)
Larry Johnson71bc6e62007-11-01 08:46:50 -0500404 u16 btsr;
405
406 /*
407 * Check for 1000BASE-X. If it is supported, then assume that the speed
408 * is 1000.
409 */
Andy Fleming16a53232011-04-07 14:38:35 -0500410 if (miiphy_is_1000base_x(devname, addr))
Larry Johnson71bc6e62007-11-01 08:46:50 -0500411 return _1000BASET;
Andy Fleming16a53232011-04-07 14:38:35 -0500412
Larry Johnson71bc6e62007-11-01 08:46:50 -0500413 /*
414 * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
415 */
416 /* Check for 1000BASE-T. */
Andy Fleming16a53232011-04-07 14:38:35 -0500417 if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) {
418 printf("PHY 1000BT status");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500419 goto miiphy_read_failed;
420 }
421 if (btsr != 0xFFFF &&
Andy Fleming16a53232011-04-07 14:38:35 -0500422 (btsr & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)))
Larry Johnson71bc6e62007-11-01 08:46:50 -0500423 return _1000BASET;
wdenk6fb6af62004-03-23 23:20:24 +0000424#endif /* CONFIG_PHY_GIGE */
wdenk855a4962004-03-14 18:23:55 +0000425
wdenka56bd922004-06-06 23:13:55 +0000426 /* Check Basic Management Control Register first. */
Andy Fleming16a53232011-04-07 14:38:35 -0500427 if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) {
428 printf("PHY speed");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500429 goto miiphy_read_failed;
wdenkc6097192002-11-03 00:24:07 +0000430 }
wdenka56bd922004-06-06 23:13:55 +0000431 /* Check if auto-negotiation is on. */
Mike Frysinger8ef583a2010-12-23 15:40:12 -0500432 if (bmcr & BMCR_ANENABLE) {
wdenka56bd922004-06-06 23:13:55 +0000433 /* Get auto-negotiation results. */
Andy Fleming16a53232011-04-07 14:38:35 -0500434 if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
435 printf("PHY AN speed");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500436 goto miiphy_read_failed;
wdenka56bd922004-06-06 23:13:55 +0000437 }
Dongpo Li8c83c032016-08-22 21:03:29 +0800438
439 if (miiphy_read(devname, addr, MII_ADVERTISE, &adv)) {
440 puts("PHY AN adv speed");
441 goto miiphy_read_failed;
442 }
443 return ((anlpar & adv) & LPA_100) ? _100BASET : _10BASET;
wdenka56bd922004-06-06 23:13:55 +0000444 }
445 /* Get speed from basic control settings. */
Mike Frysinger8ef583a2010-12-23 15:40:12 -0500446 return (bmcr & BMCR_SPEED100) ? _100BASET : _10BASET;
wdenka56bd922004-06-06 23:13:55 +0000447
Michael Zaidman5f841952010-02-28 16:28:25 +0200448miiphy_read_failed:
Andy Fleming16a53232011-04-07 14:38:35 -0500449 printf(" read failed, assuming 10BASE-T\n");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500450 return _10BASET;
wdenkc6097192002-11-03 00:24:07 +0000451}
452
wdenkc6097192002-11-03 00:24:07 +0000453/*****************************************************************************
454 *
Larry Johnson71bc6e62007-11-01 08:46:50 -0500455 * Determine full/half duplex. Return half on error.
wdenkc6097192002-11-03 00:24:07 +0000456 */
Mike Frysinger5700bb62010-07-27 18:35:08 -0400457int miiphy_duplex(const char *devname, unsigned char addr)
wdenkc6097192002-11-03 00:24:07 +0000458{
Dongpo Li8c83c032016-08-22 21:03:29 +0800459 u16 bmcr, anlpar, adv;
wdenkc6097192002-11-03 00:24:07 +0000460
wdenk6fb6af62004-03-23 23:20:24 +0000461#if defined(CONFIG_PHY_GIGE)
Larry Johnson71bc6e62007-11-01 08:46:50 -0500462 u16 btsr;
463
464 /* Check for 1000BASE-X. */
Andy Fleming16a53232011-04-07 14:38:35 -0500465 if (miiphy_is_1000base_x(devname, addr)) {
Larry Johnson71bc6e62007-11-01 08:46:50 -0500466 /* 1000BASE-X */
Andy Fleming16a53232011-04-07 14:38:35 -0500467 if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
468 printf("1000BASE-X PHY AN duplex");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500469 goto miiphy_read_failed;
470 }
471 }
472 /*
473 * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
474 */
475 /* Check for 1000BASE-T. */
Andy Fleming16a53232011-04-07 14:38:35 -0500476 if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) {
477 printf("PHY 1000BT status");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500478 goto miiphy_read_failed;
479 }
480 if (btsr != 0xFFFF) {
481 if (btsr & PHY_1000BTSR_1000FD) {
482 return FULL;
483 } else if (btsr & PHY_1000BTSR_1000HD) {
484 return HALF;
wdenk855a4962004-03-14 18:23:55 +0000485 }
486 }
wdenk6fb6af62004-03-23 23:20:24 +0000487#endif /* CONFIG_PHY_GIGE */
wdenk855a4962004-03-14 18:23:55 +0000488
wdenka56bd922004-06-06 23:13:55 +0000489 /* Check Basic Management Control Register first. */
Andy Fleming16a53232011-04-07 14:38:35 -0500490 if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) {
491 puts("PHY duplex");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500492 goto miiphy_read_failed;
wdenkc6097192002-11-03 00:24:07 +0000493 }
wdenka56bd922004-06-06 23:13:55 +0000494 /* Check if auto-negotiation is on. */
Mike Frysinger8ef583a2010-12-23 15:40:12 -0500495 if (bmcr & BMCR_ANENABLE) {
wdenka56bd922004-06-06 23:13:55 +0000496 /* Get auto-negotiation results. */
Andy Fleming16a53232011-04-07 14:38:35 -0500497 if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
498 puts("PHY AN duplex");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500499 goto miiphy_read_failed;
wdenka56bd922004-06-06 23:13:55 +0000500 }
Dongpo Li8c83c032016-08-22 21:03:29 +0800501
502 if (miiphy_read(devname, addr, MII_ADVERTISE, &adv)) {
503 puts("PHY AN adv duplex");
504 goto miiphy_read_failed;
505 }
506 return ((anlpar & adv) & (LPA_10FULL | LPA_100FULL)) ?
Larry Johnson71bc6e62007-11-01 08:46:50 -0500507 FULL : HALF;
wdenka56bd922004-06-06 23:13:55 +0000508 }
509 /* Get speed from basic control settings. */
Mike Frysinger8ef583a2010-12-23 15:40:12 -0500510 return (bmcr & BMCR_FULLDPLX) ? FULL : HALF;
wdenka56bd922004-06-06 23:13:55 +0000511
Michael Zaidman5f841952010-02-28 16:28:25 +0200512miiphy_read_failed:
Andy Fleming16a53232011-04-07 14:38:35 -0500513 printf(" read failed, assuming half duplex\n");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500514 return HALF;
515}
516
517/*****************************************************************************
518 *
519 * Return 1 if PHY supports 1000BASE-X, 0 if PHY supports 10BASE-T/100BASE-TX/
520 * 1000BASE-T, or on error.
521 */
Mike Frysinger5700bb62010-07-27 18:35:08 -0400522int miiphy_is_1000base_x(const char *devname, unsigned char addr)
Larry Johnson71bc6e62007-11-01 08:46:50 -0500523{
524#if defined(CONFIG_PHY_GIGE)
525 u16 exsr;
526
Andy Fleming16a53232011-04-07 14:38:35 -0500527 if (miiphy_read(devname, addr, MII_ESTATUS, &exsr)) {
528 printf("PHY extended status read failed, assuming no "
Larry Johnson71bc6e62007-11-01 08:46:50 -0500529 "1000BASE-X\n");
530 return 0;
531 }
Mike Frysinger8ef583a2010-12-23 15:40:12 -0500532 return 0 != (exsr & (ESTATUS_1000XF | ESTATUS_1000XH));
Larry Johnson71bc6e62007-11-01 08:46:50 -0500533#else
534 return 0;
535#endif
wdenkc6097192002-11-03 00:24:07 +0000536}
537
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200538#ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
wdenkfc3e2162003-10-08 22:33:00 +0000539/*****************************************************************************
540 *
541 * Determine link status
542 */
Mike Frysinger5700bb62010-07-27 18:35:08 -0400543int miiphy_link(const char *devname, unsigned char addr)
wdenkfc3e2162003-10-08 22:33:00 +0000544{
545 unsigned short reg;
546
wdenka3d991b2004-04-15 21:48:45 +0000547 /* dummy read; needed to latch some phys */
Andy Fleming16a53232011-04-07 14:38:35 -0500548 (void)miiphy_read(devname, addr, MII_BMSR, &reg);
549 if (miiphy_read(devname, addr, MII_BMSR, &reg)) {
550 puts("MII_BMSR read failed, assuming no link\n");
551 return 0;
wdenkfc3e2162003-10-08 22:33:00 +0000552 }
553
554 /* Determine if a link is active */
Mike Frysinger8ef583a2010-12-23 15:40:12 -0500555 if ((reg & BMSR_LSTATUS) != 0) {
Andy Fleming16a53232011-04-07 14:38:35 -0500556 return 1;
wdenkfc3e2162003-10-08 22:33:00 +0000557 } else {
Andy Fleming16a53232011-04-07 14:38:35 -0500558 return 0;
wdenkfc3e2162003-10-08 22:33:00 +0000559 }
560}
561#endif