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wdenk43c377f2002-07-20 10:56:28 +00001/*
2 * Memory Setup stuff - taken from ???
3 *
4 * See file CREDITS for list of people who contributed to this
5 * project.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20 * MA 02111-1307 USA
21 */
22
23
wdenk43c377f2002-07-20 10:56:28 +000024#include <config.h>
25#include <version.h>
26
27
28/* some parameters for the board */
29
30SYSCON1: .long 0x80000100
31SYSCON2: .long 0x80001100
32SYSCON3: .long 0x80002200
33MEMCFG1: .long 0x80000180
34MEMCFG2: .long 0x800001C0
35SDCONF: .long 0x80002300
36SDRFPR: .long 0x80002340
37
38syscon1_val: .long 0x00040100
39syscon2_val: .long 0x00000102
40syscon3_val: .long 0x0000020E
41memcfg1_val: .long 0x1f101710
42memcfg2_mask: .long 0x0000ffff @ only set lower 16 bits
43memcfg2_val: .long 0x00001f13 @ upper 16 bits are reserved for CS7 + CS6
44sdrfpr_val: .long 0x00000240
45sdconf_val: .long 0x00000522
46/* setting up the memory */
47
wdenk400558b2005-04-02 23:52:25 +000048.globl lowlevel_init
49lowlevel_init:
wdenk43c377f2002-07-20 10:56:28 +000050 /*
51 * SYSCON1-3
52 */
53 ldr r0, SYSCON1
54 ldr r1, syscon1_val
55 str r1, [r0]
56
57 ldr r0, SYSCON2
58 ldr r1, syscon2_val
59 str r1, [r0]
60
61 ldr r0, SYSCON3
62 ldr r1, syscon3_val
63 str r1, [r0]
64
65 /*
66 * MEMCFG1
67 */
68 ldr r0, MEMCFG1
69 ldr r1, memcfg1_val
70 str r1, [r0]
71
72 /*
73 * MEMCFG2
74 */
75 ldr r0, MEMCFG2
76 ldr r2, [r0]
77 ldr r1, memcfg2_mask
78 bic r2, r2, r1
79 ldr r1, memcfg2_val
80 orr r2, r2, r1
81 str r2, [r0]
82
83 /*
84 * SDRFPR,SDCONF
85 */
86 ldr r0, SDCONF
87 ldr r1, sdconf_val
88 str r1, [r0]
89
90 ldr r0, SDRFPR
91 ldr r1, sdrfpr_val
92 str r1, [r0]
93
94 /* everything is fine now */
95 mov pc, lr