blob: 5896bcb421813198fe9fee55326b6a61eb72918b [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0
Neil Armstrong20367bb2018-03-29 14:55:25 +02002/*
3 * Amlogic Meson Reset Controller driver
4 *
5 * Copyright (c) 2018 BayLibre, SAS.
6 * Author: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong20367bb2018-03-29 14:55:25 +02007 */
8
9#include <common.h>
10#include <dm.h>
Simon Glassf7ae49f2020-05-10 11:40:05 -060011#include <log.h>
Simon Glass336d4612020-02-03 07:36:16 -070012#include <malloc.h>
Neil Armstrong20367bb2018-03-29 14:55:25 +020013#include <reset-uclass.h>
14#include <regmap.h>
Simon Glasscd93d622020-05-10 11:40:13 -060015#include <linux/bitops.h>
Neil Armstrong20367bb2018-03-29 14:55:25 +020016
17#define REG_COUNT 8
18#define BITS_PER_REG 32
19#define LEVEL_OFFSET 0x7c
20
21struct meson_reset_priv {
22 struct regmap *regmap;
23};
24
25static int meson_reset_request(struct reset_ctl *reset_ctl)
26{
27 if (reset_ctl->id > (REG_COUNT * BITS_PER_REG))
28 return -EINVAL;
29
30 return 0;
31}
32
33static int meson_reset_free(struct reset_ctl *reset_ctl)
34{
35 return 0;
36}
37
38static int meson_reset_level(struct reset_ctl *reset_ctl, bool assert)
39{
40 struct meson_reset_priv *priv = dev_get_priv(reset_ctl->dev);
41 uint bank = reset_ctl->id / BITS_PER_REG;
42 uint offset = reset_ctl->id % BITS_PER_REG;
43 uint reg_offset = LEVEL_OFFSET + (bank << 2);
44 uint val;
45
46 regmap_read(priv->regmap, reg_offset, &val);
47 if (assert)
48 val &= ~BIT(offset);
49 else
50 val |= BIT(offset);
51 regmap_write(priv->regmap, reg_offset, val);
52
53 return 0;
54}
55
56static int meson_reset_assert(struct reset_ctl *reset_ctl)
57{
58 return meson_reset_level(reset_ctl, true);
59}
60
61static int meson_reset_deassert(struct reset_ctl *reset_ctl)
62{
63 return meson_reset_level(reset_ctl, false);
64}
65
66struct reset_ops meson_reset_ops = {
67 .request = meson_reset_request,
Simon Glass94474b22020-02-03 07:35:52 -070068 .rfree = meson_reset_free,
Neil Armstrong20367bb2018-03-29 14:55:25 +020069 .rst_assert = meson_reset_assert,
70 .rst_deassert = meson_reset_deassert,
71};
72
Wolfgang Denk0a50b3c2021-09-27 17:42:38 +020073static const struct udevice_id meson_reset_ids[] = {
74 { .compatible = "amlogic,meson-gxbb-reset" },
Neil Armstrongfd6b9342019-03-26 11:25:44 +010075 { .compatible = "amlogic,meson-axg-reset" },
Wolfgang Denk0a50b3c2021-09-27 17:42:38 +020076 { }
77};
Neil Armstrong20367bb2018-03-29 14:55:25 +020078
79static int meson_reset_probe(struct udevice *dev)
80{
81 struct meson_reset_priv *priv = dev_get_priv(dev);
Wolfgang Denk0a50b3c2021-09-27 17:42:38 +020082
Masahiro Yamadad3581232018-04-19 12:14:03 +090083 return regmap_init_mem(dev_ofnode(dev), &priv->regmap);
Neil Armstrong20367bb2018-03-29 14:55:25 +020084}
85
86U_BOOT_DRIVER(meson_reset) = {
87 .name = "meson_reset",
88 .id = UCLASS_RESET,
89 .of_match = meson_reset_ids,
90 .probe = meson_reset_probe,
91 .ops = &meson_reset_ops,
Simon Glass41575d82020-12-03 16:55:17 -070092 .priv_auto = sizeof(struct meson_reset_priv),
Neil Armstrong20367bb2018-03-29 14:55:25 +020093};