| Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| Stephen Warren | 4dd99d1 | 2016-08-08 11:28:25 -0600 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (c) 2016, NVIDIA CORPORATION. |
| Stephen Warren | 4dd99d1 | 2016-08-08 11:28:25 -0600 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #include <common.h> |
| 7 | #include <dm.h> |
| Simon Glass | f7ae49f | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 8 | #include <log.h> |
| Simon Glass | 336d461 | 2020-02-03 07:36:16 -0700 | [diff] [blame] | 9 | #include <malloc.h> |
| Stephen Warren | 4dd99d1 | 2016-08-08 11:28:25 -0600 | [diff] [blame] | 10 | #include <misc.h> |
| 11 | #include <reset-uclass.h> |
| 12 | #include <asm/arch-tegra/bpmp_abi.h> |
| 13 | |
| 14 | static int tegra186_reset_request(struct reset_ctl *reset_ctl) |
| 15 | { |
| 16 | debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl, |
| 17 | reset_ctl->dev, reset_ctl->id); |
| 18 | |
| 19 | return 0; |
| 20 | } |
| 21 | |
| 22 | static int tegra186_reset_free(struct reset_ctl *reset_ctl) |
| 23 | { |
| 24 | debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl, |
| 25 | reset_ctl->dev, reset_ctl->id); |
| 26 | |
| 27 | return 0; |
| 28 | } |
| 29 | |
| 30 | static int tegra186_reset_common(struct reset_ctl *reset_ctl, |
| 31 | enum mrq_reset_commands cmd) |
| 32 | { |
| 33 | struct mrq_reset_request req; |
| 34 | int ret; |
| 35 | |
| 36 | req.cmd = cmd; |
| 37 | req.reset_id = reset_ctl->id; |
| 38 | |
| 39 | ret = misc_call(reset_ctl->dev->parent, MRQ_RESET, &req, sizeof(req), |
| 40 | NULL, 0); |
| 41 | if (ret < 0) |
| 42 | return ret; |
| 43 | |
| 44 | return 0; |
| 45 | } |
| 46 | |
| 47 | static int tegra186_reset_assert(struct reset_ctl *reset_ctl) |
| 48 | { |
| 49 | debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl, |
| 50 | reset_ctl->dev, reset_ctl->id); |
| 51 | |
| 52 | return tegra186_reset_common(reset_ctl, CMD_RESET_ASSERT); |
| 53 | } |
| 54 | |
| 55 | static int tegra186_reset_deassert(struct reset_ctl *reset_ctl) |
| 56 | { |
| 57 | debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl, |
| 58 | reset_ctl->dev, reset_ctl->id); |
| 59 | |
| 60 | return tegra186_reset_common(reset_ctl, CMD_RESET_DEASSERT); |
| 61 | } |
| 62 | |
| 63 | struct reset_ops tegra186_reset_ops = { |
| 64 | .request = tegra186_reset_request, |
| Simon Glass | 94474b2 | 2020-02-03 07:35:52 -0700 | [diff] [blame] | 65 | .rfree = tegra186_reset_free, |
| Stephen Warren | 4dd99d1 | 2016-08-08 11:28:25 -0600 | [diff] [blame] | 66 | .rst_assert = tegra186_reset_assert, |
| 67 | .rst_deassert = tegra186_reset_deassert, |
| 68 | }; |
| 69 | |
| 70 | static int tegra186_reset_probe(struct udevice *dev) |
| 71 | { |
| 72 | debug("%s(dev=%p)\n", __func__, dev); |
| 73 | |
| 74 | return 0; |
| 75 | } |
| 76 | |
| 77 | U_BOOT_DRIVER(tegra186_reset) = { |
| 78 | .name = "tegra186_reset", |
| 79 | .id = UCLASS_RESET, |
| 80 | .probe = tegra186_reset_probe, |
| 81 | .ops = &tegra186_reset_ops, |
| 82 | }; |