Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Heiko Schocher | 8ea1fbf | 2015-09-08 11:52:50 +0200 | [diff] [blame] | 2 | /* |
Heiko Schocher | 6201976 | 2015-09-08 11:52:51 +0200 | [diff] [blame] | 3 | * from linux: |
| 4 | * c94e289f195e: usb: gadget: remove incorrect __init/__exit annotations |
| 5 | * |
Heiko Schocher | 8ea1fbf | 2015-09-08 11:52:50 +0200 | [diff] [blame] | 6 | * at91_udc -- driver for at91-series USB peripheral controller |
| 7 | * |
| 8 | * Copyright (C) 2004 by Thomas Rathbone |
| 9 | * Copyright (C) 2005 by HP Labs |
| 10 | * Copyright (C) 2005 by David Brownell |
Heiko Schocher | 8ea1fbf | 2015-09-08 11:52:50 +0200 | [diff] [blame] | 11 | */ |
| 12 | |
| 13 | #undef VERBOSE_DEBUG |
| 14 | #undef PACKET_TRACE |
| 15 | |
Heiko Schocher | 6201976 | 2015-09-08 11:52:51 +0200 | [diff] [blame] | 16 | #include <common.h> |
Simon Glass | 61b29b8 | 2020-02-03 07:36:15 -0700 | [diff] [blame] | 17 | #include <dm/devres.h> |
Simon Glass | eb41d8a | 2020-05-10 11:40:08 -0600 | [diff] [blame] | 18 | #include <linux/bug.h> |
Simon Glass | 61b29b8 | 2020-02-03 07:36:15 -0700 | [diff] [blame] | 19 | #include <linux/err.h> |
Masahiro Yamada | 1221ce4 | 2016-09-21 11:28:55 +0900 | [diff] [blame] | 20 | #include <linux/errno.h> |
Heiko Schocher | 6201976 | 2015-09-08 11:52:51 +0200 | [diff] [blame] | 21 | #include <asm/io.h> |
| 22 | #include <asm/gpio.h> |
| 23 | #include <asm/hardware.h> |
| 24 | #include <mach/at91_matrix.h> |
Heiko Schocher | 8ea1fbf | 2015-09-08 11:52:50 +0200 | [diff] [blame] | 25 | #include <linux/list.h> |
Heiko Schocher | 8ea1fbf | 2015-09-08 11:52:50 +0200 | [diff] [blame] | 26 | #include <linux/usb/ch9.h> |
| 27 | #include <linux/usb/gadget.h> |
Heiko Schocher | 6201976 | 2015-09-08 11:52:51 +0200 | [diff] [blame] | 28 | #include <linux/usb/at91_udc.h> |
| 29 | #include <malloc.h> |
Heiko Schocher | 8ea1fbf | 2015-09-08 11:52:50 +0200 | [diff] [blame] | 30 | |
| 31 | #include "at91_udc.h" |
| 32 | |
Heiko Schocher | 8ea1fbf | 2015-09-08 11:52:50 +0200 | [diff] [blame] | 33 | /* |
| 34 | * This controller is simple and PIO-only. It's used in many AT91-series |
| 35 | * full speed USB controllers, including the at91rm9200 (arm920T, with MMU), |
| 36 | * at91sam926x (arm926ejs, with MMU), and several no-mmu versions. |
| 37 | * |
| 38 | * This driver expects the board has been wired with two GPIOs supporting |
| 39 | * a VBUS sensing IRQ, and a D+ pullup. (They may be omitted, but the |
| 40 | * testing hasn't covered such cases.) |
| 41 | * |
| 42 | * The pullup is most important (so it's integrated on sam926x parts). It |
| 43 | * provides software control over whether the host enumerates the device. |
| 44 | * |
| 45 | * The VBUS sensing helps during enumeration, and allows both USB clocks |
| 46 | * (and the transceiver) to stay gated off until they're necessary, saving |
| 47 | * power. During USB suspend, the 48 MHz clock is gated off in hardware; |
| 48 | * it may also be gated off by software during some Linux sleep states. |
| 49 | */ |
| 50 | |
| 51 | #define DRIVER_VERSION "3 May 2006" |
| 52 | |
| 53 | static const char driver_name [] = "at91_udc"; |
| 54 | static const char * const ep_names[] = { |
| 55 | "ep0", |
| 56 | "ep1", |
| 57 | "ep2", |
| 58 | "ep3-int", |
| 59 | "ep4", |
| 60 | "ep5", |
| 61 | }; |
| 62 | #define ep0name ep_names[0] |
| 63 | |
Heiko Schocher | 8ea1fbf | 2015-09-08 11:52:50 +0200 | [diff] [blame] | 64 | #define at91_udp_read(udc, reg) \ |
| 65 | __raw_readl((udc)->udp_baseaddr + (reg)) |
| 66 | #define at91_udp_write(udc, reg, val) \ |
| 67 | __raw_writel((val), (udc)->udp_baseaddr + (reg)) |
| 68 | |
Heiko Schocher | 6201976 | 2015-09-08 11:52:51 +0200 | [diff] [blame] | 69 | static struct at91_udc *controller; |
Heiko Schocher | 8ea1fbf | 2015-09-08 11:52:50 +0200 | [diff] [blame] | 70 | |
| 71 | /*-------------------------------------------------------------------------*/ |
| 72 | |
| 73 | static void done(struct at91_ep *ep, struct at91_request *req, int status) |
| 74 | { |
| 75 | unsigned stopped = ep->stopped; |
| 76 | struct at91_udc *udc = ep->udc; |
| 77 | |
| 78 | list_del_init(&req->queue); |
| 79 | if (req->req.status == -EINPROGRESS) |
| 80 | req->req.status = status; |
| 81 | else |
| 82 | status = req->req.status; |
| 83 | if (status && status != -ESHUTDOWN) |
| 84 | VDBG("%s done %p, status %d\n", ep->ep.name, req, status); |
| 85 | |
| 86 | ep->stopped = 1; |
| 87 | spin_unlock(&udc->lock); |
Heiko Schocher | 6201976 | 2015-09-08 11:52:51 +0200 | [diff] [blame] | 88 | req->req.complete(&ep->ep, &req->req); |
Heiko Schocher | 8ea1fbf | 2015-09-08 11:52:50 +0200 | [diff] [blame] | 89 | spin_lock(&udc->lock); |
| 90 | ep->stopped = stopped; |
| 91 | |
| 92 | /* ep0 is always ready; other endpoints need a non-empty queue */ |
| 93 | if (list_empty(&ep->queue) && ep->int_mask != (1 << 0)) |
| 94 | at91_udp_write(udc, AT91_UDP_IDR, ep->int_mask); |
| 95 | } |
| 96 | |
| 97 | /*-------------------------------------------------------------------------*/ |
| 98 | |
| 99 | /* bits indicating OUT fifo has data ready */ |
| 100 | #define RX_DATA_READY (AT91_UDP_RX_DATA_BK0 | AT91_UDP_RX_DATA_BK1) |
| 101 | |
| 102 | /* |
| 103 | * Endpoint FIFO CSR bits have a mix of bits, making it unsafe to just write |
| 104 | * back most of the value you just read (because of side effects, including |
| 105 | * bits that may change after reading and before writing). |
| 106 | * |
| 107 | * Except when changing a specific bit, always write values which: |
| 108 | * - clear SET_FX bits (setting them could change something) |
| 109 | * - set CLR_FX bits (clearing them could change something) |
| 110 | * |
| 111 | * There are also state bits like FORCESTALL, EPEDS, DIR, and EPTYPE |
| 112 | * that shouldn't normally be changed. |
| 113 | * |
| 114 | * NOTE at91sam9260 docs mention synch between UDPCK and MCK clock domains, |
| 115 | * implying a need to wait for one write to complete (test relevant bits) |
| 116 | * before starting the next write. This shouldn't be an issue given how |
| 117 | * infrequently we write, except maybe for write-then-read idioms. |
| 118 | */ |
| 119 | #define SET_FX (AT91_UDP_TXPKTRDY) |
| 120 | #define CLR_FX (RX_DATA_READY | AT91_UDP_RXSETUP \ |
| 121 | | AT91_UDP_STALLSENT | AT91_UDP_TXCOMP) |
| 122 | |
| 123 | /* pull OUT packet data from the endpoint's fifo */ |
| 124 | static int read_fifo (struct at91_ep *ep, struct at91_request *req) |
| 125 | { |
| 126 | u32 __iomem *creg = ep->creg; |
| 127 | u8 __iomem *dreg = ep->creg + (AT91_UDP_FDR(0) - AT91_UDP_CSR(0)); |
| 128 | u32 csr; |
| 129 | u8 *buf; |
| 130 | unsigned int count, bufferspace, is_done; |
| 131 | |
| 132 | buf = req->req.buf + req->req.actual; |
| 133 | bufferspace = req->req.length - req->req.actual; |
| 134 | |
| 135 | /* |
| 136 | * there might be nothing to read if ep_queue() calls us, |
| 137 | * or if we already emptied both pingpong buffers |
| 138 | */ |
| 139 | rescan: |
| 140 | csr = __raw_readl(creg); |
| 141 | if ((csr & RX_DATA_READY) == 0) |
| 142 | return 0; |
| 143 | |
| 144 | count = (csr & AT91_UDP_RXBYTECNT) >> 16; |
| 145 | if (count > ep->ep.maxpacket) |
| 146 | count = ep->ep.maxpacket; |
| 147 | if (count > bufferspace) { |
| 148 | DBG("%s buffer overflow\n", ep->ep.name); |
| 149 | req->req.status = -EOVERFLOW; |
| 150 | count = bufferspace; |
| 151 | } |
Heiko Schocher | 6201976 | 2015-09-08 11:52:51 +0200 | [diff] [blame] | 152 | __raw_readsb((unsigned long)dreg, buf, count); |
Heiko Schocher | 8ea1fbf | 2015-09-08 11:52:50 +0200 | [diff] [blame] | 153 | |
| 154 | /* release and swap pingpong mem bank */ |
| 155 | csr |= CLR_FX; |
| 156 | if (ep->is_pingpong) { |
| 157 | if (ep->fifo_bank == 0) { |
| 158 | csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK0); |
| 159 | ep->fifo_bank = 1; |
| 160 | } else { |
| 161 | csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK1); |
| 162 | ep->fifo_bank = 0; |
| 163 | } |
| 164 | } else |
| 165 | csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK0); |
| 166 | __raw_writel(csr, creg); |
| 167 | |
| 168 | req->req.actual += count; |
| 169 | is_done = (count < ep->ep.maxpacket); |
| 170 | if (count == bufferspace) |
| 171 | is_done = 1; |
| 172 | |
| 173 | PACKET("%s %p out/%d%s\n", ep->ep.name, &req->req, count, |
| 174 | is_done ? " (done)" : ""); |
| 175 | |
| 176 | /* |
| 177 | * avoid extra trips through IRQ logic for packets already in |
| 178 | * the fifo ... maybe preventing an extra (expensive) OUT-NAK |
| 179 | */ |
| 180 | if (is_done) |
| 181 | done(ep, req, 0); |
| 182 | else if (ep->is_pingpong) { |
| 183 | /* |
| 184 | * One dummy read to delay the code because of a HW glitch: |
| 185 | * CSR returns bad RXCOUNT when read too soon after updating |
| 186 | * RX_DATA_BK flags. |
| 187 | */ |
| 188 | csr = __raw_readl(creg); |
| 189 | |
| 190 | bufferspace -= count; |
| 191 | buf += count; |
| 192 | goto rescan; |
| 193 | } |
| 194 | |
| 195 | return is_done; |
| 196 | } |
| 197 | |
| 198 | /* load fifo for an IN packet */ |
| 199 | static int write_fifo(struct at91_ep *ep, struct at91_request *req) |
| 200 | { |
| 201 | u32 __iomem *creg = ep->creg; |
| 202 | u32 csr = __raw_readl(creg); |
| 203 | u8 __iomem *dreg = ep->creg + (AT91_UDP_FDR(0) - AT91_UDP_CSR(0)); |
| 204 | unsigned total, count, is_last; |
| 205 | u8 *buf; |
| 206 | |
| 207 | /* |
| 208 | * TODO: allow for writing two packets to the fifo ... that'll |
| 209 | * reduce the amount of IN-NAKing, but probably won't affect |
| 210 | * throughput much. (Unlike preventing OUT-NAKing!) |
| 211 | */ |
| 212 | |
| 213 | /* |
| 214 | * If ep_queue() calls us, the queue is empty and possibly in |
| 215 | * odd states like TXCOMP not yet cleared (we do it, saving at |
| 216 | * least one IRQ) or the fifo not yet being free. Those aren't |
| 217 | * issues normally (IRQ handler fast path). |
| 218 | */ |
| 219 | if (unlikely(csr & (AT91_UDP_TXCOMP | AT91_UDP_TXPKTRDY))) { |
| 220 | if (csr & AT91_UDP_TXCOMP) { |
| 221 | csr |= CLR_FX; |
| 222 | csr &= ~(SET_FX | AT91_UDP_TXCOMP); |
| 223 | __raw_writel(csr, creg); |
| 224 | csr = __raw_readl(creg); |
| 225 | } |
| 226 | if (csr & AT91_UDP_TXPKTRDY) |
| 227 | return 0; |
| 228 | } |
| 229 | |
| 230 | buf = req->req.buf + req->req.actual; |
| 231 | prefetch(buf); |
| 232 | total = req->req.length - req->req.actual; |
| 233 | if (ep->ep.maxpacket < total) { |
| 234 | count = ep->ep.maxpacket; |
| 235 | is_last = 0; |
| 236 | } else { |
| 237 | count = total; |
| 238 | is_last = (count < ep->ep.maxpacket) || !req->req.zero; |
| 239 | } |
| 240 | |
| 241 | /* |
| 242 | * Write the packet, maybe it's a ZLP. |
| 243 | * |
| 244 | * NOTE: incrementing req->actual before we receive the ACK means |
| 245 | * gadget driver IN bytecounts can be wrong in fault cases. That's |
| 246 | * fixable with PIO drivers like this one (save "count" here, and |
| 247 | * do the increment later on TX irq), but not for most DMA hardware. |
| 248 | * |
| 249 | * So all gadget drivers must accept that potential error. Some |
| 250 | * hardware supports precise fifo status reporting, letting them |
| 251 | * recover when the actual bytecount matters (e.g. for USB Test |
| 252 | * and Measurement Class devices). |
| 253 | */ |
Heiko Schocher | 6201976 | 2015-09-08 11:52:51 +0200 | [diff] [blame] | 254 | __raw_writesb((unsigned long)dreg, buf, count); |
Heiko Schocher | 8ea1fbf | 2015-09-08 11:52:50 +0200 | [diff] [blame] | 255 | csr &= ~SET_FX; |
| 256 | csr |= CLR_FX | AT91_UDP_TXPKTRDY; |
| 257 | __raw_writel(csr, creg); |
| 258 | req->req.actual += count; |
| 259 | |
| 260 | PACKET("%s %p in/%d%s\n", ep->ep.name, &req->req, count, |
| 261 | is_last ? " (done)" : ""); |
| 262 | if (is_last) |
| 263 | done(ep, req, 0); |
| 264 | return is_last; |
| 265 | } |
| 266 | |
| 267 | static void nuke(struct at91_ep *ep, int status) |
| 268 | { |
| 269 | struct at91_request *req; |
| 270 | |
| 271 | /* terminate any request in the queue */ |
| 272 | ep->stopped = 1; |
| 273 | if (list_empty(&ep->queue)) |
| 274 | return; |
| 275 | |
| 276 | VDBG("%s %s\n", __func__, ep->ep.name); |
| 277 | while (!list_empty(&ep->queue)) { |
| 278 | req = list_entry(ep->queue.next, struct at91_request, queue); |
| 279 | done(ep, req, status); |
| 280 | } |
| 281 | } |
| 282 | |
| 283 | /*-------------------------------------------------------------------------*/ |
| 284 | |
| 285 | static int at91_ep_enable(struct usb_ep *_ep, |
| 286 | const struct usb_endpoint_descriptor *desc) |
| 287 | { |
| 288 | struct at91_ep *ep = container_of(_ep, struct at91_ep, ep); |
| 289 | struct at91_udc *udc; |
| 290 | u16 maxpacket; |
| 291 | u32 tmp; |
| 292 | unsigned long flags; |
| 293 | |
| 294 | if (!_ep || !ep |
| 295 | || !desc || _ep->name == ep0name |
| 296 | || desc->bDescriptorType != USB_DT_ENDPOINT |
| 297 | || (maxpacket = usb_endpoint_maxp(desc)) == 0 |
| 298 | || maxpacket > ep->maxpacket) { |
| 299 | DBG("bad ep or descriptor\n"); |
| 300 | return -EINVAL; |
| 301 | } |
| 302 | |
| 303 | udc = ep->udc; |
| 304 | if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) { |
| 305 | DBG("bogus device state\n"); |
| 306 | return -ESHUTDOWN; |
| 307 | } |
| 308 | |
| 309 | tmp = usb_endpoint_type(desc); |
| 310 | switch (tmp) { |
| 311 | case USB_ENDPOINT_XFER_CONTROL: |
| 312 | DBG("only one control endpoint\n"); |
| 313 | return -EINVAL; |
| 314 | case USB_ENDPOINT_XFER_INT: |
| 315 | if (maxpacket > 64) |
| 316 | goto bogus_max; |
| 317 | break; |
| 318 | case USB_ENDPOINT_XFER_BULK: |
| 319 | switch (maxpacket) { |
| 320 | case 8: |
| 321 | case 16: |
| 322 | case 32: |
| 323 | case 64: |
| 324 | goto ok; |
| 325 | } |
| 326 | bogus_max: |
| 327 | DBG("bogus maxpacket %d\n", maxpacket); |
| 328 | return -EINVAL; |
| 329 | case USB_ENDPOINT_XFER_ISOC: |
| 330 | if (!ep->is_pingpong) { |
| 331 | DBG("iso requires double buffering\n"); |
| 332 | return -EINVAL; |
| 333 | } |
| 334 | break; |
| 335 | } |
| 336 | |
| 337 | ok: |
| 338 | spin_lock_irqsave(&udc->lock, flags); |
| 339 | |
| 340 | /* initialize endpoint to match this descriptor */ |
| 341 | ep->is_in = usb_endpoint_dir_in(desc); |
| 342 | ep->is_iso = (tmp == USB_ENDPOINT_XFER_ISOC); |
| 343 | ep->stopped = 0; |
| 344 | if (ep->is_in) |
| 345 | tmp |= 0x04; |
| 346 | tmp <<= 8; |
| 347 | tmp |= AT91_UDP_EPEDS; |
| 348 | __raw_writel(tmp, ep->creg); |
| 349 | |
| 350 | ep->ep.maxpacket = maxpacket; |
| 351 | |
| 352 | /* |
| 353 | * reset/init endpoint fifo. NOTE: leaves fifo_bank alone, |
| 354 | * since endpoint resets don't reset hw pingpong state. |
| 355 | */ |
| 356 | at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask); |
| 357 | at91_udp_write(udc, AT91_UDP_RST_EP, 0); |
| 358 | |
| 359 | spin_unlock_irqrestore(&udc->lock, flags); |
| 360 | return 0; |
| 361 | } |
| 362 | |
| 363 | static int at91_ep_disable (struct usb_ep * _ep) |
| 364 | { |
| 365 | struct at91_ep *ep = container_of(_ep, struct at91_ep, ep); |
| 366 | struct at91_udc *udc = ep->udc; |
| 367 | unsigned long flags; |
| 368 | |
| 369 | if (ep == &ep->udc->ep[0]) |
| 370 | return -EINVAL; |
| 371 | |
| 372 | spin_lock_irqsave(&udc->lock, flags); |
| 373 | |
| 374 | nuke(ep, -ESHUTDOWN); |
| 375 | |
| 376 | /* restore the endpoint's pristine config */ |
| 377 | ep->ep.desc = NULL; |
| 378 | ep->ep.maxpacket = ep->maxpacket; |
| 379 | |
| 380 | /* reset fifos and endpoint */ |
| 381 | if (ep->udc->clocked) { |
| 382 | at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask); |
| 383 | at91_udp_write(udc, AT91_UDP_RST_EP, 0); |
| 384 | __raw_writel(0, ep->creg); |
| 385 | } |
| 386 | |
| 387 | spin_unlock_irqrestore(&udc->lock, flags); |
| 388 | return 0; |
| 389 | } |
| 390 | |
| 391 | /* |
| 392 | * this is a PIO-only driver, so there's nothing |
| 393 | * interesting for request or buffer allocation. |
| 394 | */ |
| 395 | |
| 396 | static struct usb_request * |
| 397 | at91_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags) |
| 398 | { |
| 399 | struct at91_request *req; |
| 400 | |
| 401 | req = kzalloc(sizeof (struct at91_request), gfp_flags); |
| 402 | if (!req) |
| 403 | return NULL; |
| 404 | |
| 405 | INIT_LIST_HEAD(&req->queue); |
| 406 | return &req->req; |
| 407 | } |
| 408 | |
| 409 | static void at91_ep_free_request(struct usb_ep *_ep, struct usb_request *_req) |
| 410 | { |
| 411 | struct at91_request *req; |
| 412 | |
| 413 | req = container_of(_req, struct at91_request, req); |
| 414 | BUG_ON(!list_empty(&req->queue)); |
| 415 | kfree(req); |
| 416 | } |
| 417 | |
| 418 | static int at91_ep_queue(struct usb_ep *_ep, |
| 419 | struct usb_request *_req, gfp_t gfp_flags) |
| 420 | { |
| 421 | struct at91_request *req; |
| 422 | struct at91_ep *ep; |
| 423 | struct at91_udc *udc; |
| 424 | int status; |
| 425 | unsigned long flags; |
| 426 | |
| 427 | req = container_of(_req, struct at91_request, req); |
| 428 | ep = container_of(_ep, struct at91_ep, ep); |
| 429 | |
| 430 | if (!_req || !_req->complete |
| 431 | || !_req->buf || !list_empty(&req->queue)) { |
| 432 | DBG("invalid request\n"); |
| 433 | return -EINVAL; |
| 434 | } |
| 435 | |
| 436 | if (!_ep || (!ep->ep.desc && ep->ep.name != ep0name)) { |
| 437 | DBG("invalid ep\n"); |
| 438 | return -EINVAL; |
| 439 | } |
| 440 | |
| 441 | udc = ep->udc; |
| 442 | |
| 443 | if (!udc || !udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) { |
| 444 | DBG("invalid device\n"); |
| 445 | return -EINVAL; |
| 446 | } |
| 447 | |
| 448 | _req->status = -EINPROGRESS; |
| 449 | _req->actual = 0; |
| 450 | |
| 451 | spin_lock_irqsave(&udc->lock, flags); |
| 452 | |
| 453 | /* try to kickstart any empty and idle queue */ |
| 454 | if (list_empty(&ep->queue) && !ep->stopped) { |
| 455 | int is_ep0; |
| 456 | |
| 457 | /* |
| 458 | * If this control request has a non-empty DATA stage, this |
| 459 | * will start that stage. It works just like a non-control |
| 460 | * request (until the status stage starts, maybe early). |
| 461 | * |
| 462 | * If the data stage is empty, then this starts a successful |
| 463 | * IN/STATUS stage. (Unsuccessful ones use set_halt.) |
| 464 | */ |
| 465 | is_ep0 = (ep->ep.name == ep0name); |
| 466 | if (is_ep0) { |
| 467 | u32 tmp; |
| 468 | |
| 469 | if (!udc->req_pending) { |
| 470 | status = -EINVAL; |
| 471 | goto done; |
| 472 | } |
| 473 | |
| 474 | /* |
| 475 | * defer changing CONFG until after the gadget driver |
| 476 | * reconfigures the endpoints. |
| 477 | */ |
| 478 | if (udc->wait_for_config_ack) { |
| 479 | tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT); |
| 480 | tmp ^= AT91_UDP_CONFG; |
| 481 | VDBG("toggle config\n"); |
| 482 | at91_udp_write(udc, AT91_UDP_GLB_STAT, tmp); |
| 483 | } |
| 484 | if (req->req.length == 0) { |
| 485 | ep0_in_status: |
| 486 | PACKET("ep0 in/status\n"); |
| 487 | status = 0; |
| 488 | tmp = __raw_readl(ep->creg); |
| 489 | tmp &= ~SET_FX; |
| 490 | tmp |= CLR_FX | AT91_UDP_TXPKTRDY; |
| 491 | __raw_writel(tmp, ep->creg); |
| 492 | udc->req_pending = 0; |
| 493 | goto done; |
| 494 | } |
| 495 | } |
| 496 | |
| 497 | if (ep->is_in) |
| 498 | status = write_fifo(ep, req); |
| 499 | else { |
| 500 | status = read_fifo(ep, req); |
| 501 | |
| 502 | /* IN/STATUS stage is otherwise triggered by irq */ |
| 503 | if (status && is_ep0) |
| 504 | goto ep0_in_status; |
| 505 | } |
| 506 | } else |
| 507 | status = 0; |
| 508 | |
| 509 | if (req && !status) { |
| 510 | list_add_tail (&req->queue, &ep->queue); |
| 511 | at91_udp_write(udc, AT91_UDP_IER, ep->int_mask); |
| 512 | } |
| 513 | done: |
| 514 | spin_unlock_irqrestore(&udc->lock, flags); |
| 515 | return (status < 0) ? status : 0; |
| 516 | } |
| 517 | |
| 518 | static int at91_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req) |
| 519 | { |
| 520 | struct at91_ep *ep; |
| 521 | struct at91_request *req; |
| 522 | unsigned long flags; |
Heiko Schocher | 8ea1fbf | 2015-09-08 11:52:50 +0200 | [diff] [blame] | 523 | |
| 524 | ep = container_of(_ep, struct at91_ep, ep); |
| 525 | if (!_ep || ep->ep.name == ep0name) |
| 526 | return -EINVAL; |
| 527 | |
Heiko Schocher | 8ea1fbf | 2015-09-08 11:52:50 +0200 | [diff] [blame] | 528 | spin_lock_irqsave(&udc->lock, flags); |
| 529 | |
| 530 | /* make sure it's actually queued on this endpoint */ |
| 531 | list_for_each_entry (req, &ep->queue, queue) { |
| 532 | if (&req->req == _req) |
| 533 | break; |
| 534 | } |
| 535 | if (&req->req != _req) { |
| 536 | spin_unlock_irqrestore(&udc->lock, flags); |
| 537 | return -EINVAL; |
| 538 | } |
| 539 | |
| 540 | done(ep, req, -ECONNRESET); |
| 541 | spin_unlock_irqrestore(&udc->lock, flags); |
| 542 | return 0; |
| 543 | } |
| 544 | |
| 545 | static int at91_ep_set_halt(struct usb_ep *_ep, int value) |
| 546 | { |
| 547 | struct at91_ep *ep = container_of(_ep, struct at91_ep, ep); |
| 548 | struct at91_udc *udc = ep->udc; |
| 549 | u32 __iomem *creg; |
| 550 | u32 csr; |
| 551 | unsigned long flags; |
| 552 | int status = 0; |
| 553 | |
| 554 | if (!_ep || ep->is_iso || !ep->udc->clocked) |
| 555 | return -EINVAL; |
| 556 | |
| 557 | creg = ep->creg; |
| 558 | spin_lock_irqsave(&udc->lock, flags); |
| 559 | |
| 560 | csr = __raw_readl(creg); |
| 561 | |
| 562 | /* |
| 563 | * fail with still-busy IN endpoints, ensuring correct sequencing |
| 564 | * of data tx then stall. note that the fifo rx bytecount isn't |
| 565 | * completely accurate as a tx bytecount. |
| 566 | */ |
| 567 | if (ep->is_in && (!list_empty(&ep->queue) || (csr >> 16) != 0)) |
| 568 | status = -EAGAIN; |
| 569 | else { |
| 570 | csr |= CLR_FX; |
| 571 | csr &= ~SET_FX; |
| 572 | if (value) { |
| 573 | csr |= AT91_UDP_FORCESTALL; |
| 574 | VDBG("halt %s\n", ep->ep.name); |
| 575 | } else { |
| 576 | at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask); |
| 577 | at91_udp_write(udc, AT91_UDP_RST_EP, 0); |
| 578 | csr &= ~AT91_UDP_FORCESTALL; |
| 579 | } |
| 580 | __raw_writel(csr, creg); |
| 581 | } |
| 582 | |
| 583 | spin_unlock_irqrestore(&udc->lock, flags); |
| 584 | return status; |
| 585 | } |
| 586 | |
| 587 | static const struct usb_ep_ops at91_ep_ops = { |
| 588 | .enable = at91_ep_enable, |
| 589 | .disable = at91_ep_disable, |
| 590 | .alloc_request = at91_ep_alloc_request, |
| 591 | .free_request = at91_ep_free_request, |
| 592 | .queue = at91_ep_queue, |
| 593 | .dequeue = at91_ep_dequeue, |
| 594 | .set_halt = at91_ep_set_halt, |
| 595 | /* there's only imprecise fifo status reporting */ |
| 596 | }; |
| 597 | |
| 598 | /*-------------------------------------------------------------------------*/ |
| 599 | |
| 600 | static int at91_get_frame(struct usb_gadget *gadget) |
| 601 | { |
| 602 | struct at91_udc *udc = to_udc(gadget); |
| 603 | |
| 604 | if (!to_udc(gadget)->clocked) |
| 605 | return -EINVAL; |
| 606 | return at91_udp_read(udc, AT91_UDP_FRM_NUM) & AT91_UDP_NUM; |
| 607 | } |
| 608 | |
| 609 | static int at91_wakeup(struct usb_gadget *gadget) |
| 610 | { |
| 611 | struct at91_udc *udc = to_udc(gadget); |
| 612 | u32 glbstate; |
| 613 | int status = -EINVAL; |
| 614 | unsigned long flags; |
| 615 | |
| 616 | DBG("%s\n", __func__ ); |
| 617 | spin_lock_irqsave(&udc->lock, flags); |
| 618 | |
| 619 | if (!udc->clocked || !udc->suspended) |
| 620 | goto done; |
| 621 | |
| 622 | /* NOTE: some "early versions" handle ESR differently ... */ |
| 623 | |
| 624 | glbstate = at91_udp_read(udc, AT91_UDP_GLB_STAT); |
| 625 | if (!(glbstate & AT91_UDP_ESR)) |
| 626 | goto done; |
| 627 | glbstate |= AT91_UDP_ESR; |
| 628 | at91_udp_write(udc, AT91_UDP_GLB_STAT, glbstate); |
| 629 | |
| 630 | done: |
| 631 | spin_unlock_irqrestore(&udc->lock, flags); |
| 632 | return status; |
| 633 | } |
| 634 | |
| 635 | /* reinit == restore initial software state */ |
| 636 | static void udc_reinit(struct at91_udc *udc) |
| 637 | { |
| 638 | u32 i; |
| 639 | |
| 640 | INIT_LIST_HEAD(&udc->gadget.ep_list); |
| 641 | INIT_LIST_HEAD(&udc->gadget.ep0->ep_list); |
| 642 | |
| 643 | for (i = 0; i < NUM_ENDPOINTS; i++) { |
| 644 | struct at91_ep *ep = &udc->ep[i]; |
| 645 | |
| 646 | if (i != 0) |
| 647 | list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list); |
| 648 | ep->ep.desc = NULL; |
| 649 | ep->stopped = 0; |
| 650 | ep->fifo_bank = 0; |
| 651 | usb_ep_set_maxpacket_limit(&ep->ep, ep->maxpacket); |
| 652 | ep->creg = (void __iomem *) udc->udp_baseaddr + AT91_UDP_CSR(i); |
| 653 | /* initialize one queue per endpoint */ |
| 654 | INIT_LIST_HEAD(&ep->queue); |
| 655 | } |
| 656 | } |
| 657 | |
| 658 | static void reset_gadget(struct at91_udc *udc) |
| 659 | { |
| 660 | struct usb_gadget_driver *driver = udc->driver; |
| 661 | int i; |
| 662 | |
| 663 | if (udc->gadget.speed == USB_SPEED_UNKNOWN) |
| 664 | driver = NULL; |
| 665 | udc->gadget.speed = USB_SPEED_UNKNOWN; |
| 666 | udc->suspended = 0; |
| 667 | |
| 668 | for (i = 0; i < NUM_ENDPOINTS; i++) { |
| 669 | struct at91_ep *ep = &udc->ep[i]; |
| 670 | |
| 671 | ep->stopped = 1; |
| 672 | nuke(ep, -ESHUTDOWN); |
| 673 | } |
| 674 | if (driver) { |
| 675 | spin_unlock(&udc->lock); |
Heiko Schocher | 6201976 | 2015-09-08 11:52:51 +0200 | [diff] [blame] | 676 | udc->driver->disconnect(&udc->gadget); |
Heiko Schocher | 8ea1fbf | 2015-09-08 11:52:50 +0200 | [diff] [blame] | 677 | spin_lock(&udc->lock); |
| 678 | } |
| 679 | |
| 680 | udc_reinit(udc); |
| 681 | } |
| 682 | |
| 683 | static void stop_activity(struct at91_udc *udc) |
| 684 | { |
| 685 | struct usb_gadget_driver *driver = udc->driver; |
| 686 | int i; |
| 687 | |
| 688 | if (udc->gadget.speed == USB_SPEED_UNKNOWN) |
| 689 | driver = NULL; |
| 690 | udc->gadget.speed = USB_SPEED_UNKNOWN; |
| 691 | udc->suspended = 0; |
| 692 | |
| 693 | for (i = 0; i < NUM_ENDPOINTS; i++) { |
| 694 | struct at91_ep *ep = &udc->ep[i]; |
| 695 | ep->stopped = 1; |
| 696 | nuke(ep, -ESHUTDOWN); |
| 697 | } |
| 698 | if (driver) { |
| 699 | spin_unlock(&udc->lock); |
| 700 | driver->disconnect(&udc->gadget); |
| 701 | spin_lock(&udc->lock); |
| 702 | } |
| 703 | |
| 704 | udc_reinit(udc); |
| 705 | } |
| 706 | |
| 707 | static void clk_on(struct at91_udc *udc) |
| 708 | { |
| 709 | if (udc->clocked) |
| 710 | return; |
| 711 | udc->clocked = 1; |
Heiko Schocher | 8ea1fbf | 2015-09-08 11:52:50 +0200 | [diff] [blame] | 712 | } |
| 713 | |
| 714 | static void clk_off(struct at91_udc *udc) |
| 715 | { |
| 716 | if (!udc->clocked) |
| 717 | return; |
| 718 | udc->clocked = 0; |
| 719 | udc->gadget.speed = USB_SPEED_UNKNOWN; |
Heiko Schocher | 8ea1fbf | 2015-09-08 11:52:50 +0200 | [diff] [blame] | 720 | } |
| 721 | |
| 722 | /* |
| 723 | * activate/deactivate link with host; minimize power usage for |
| 724 | * inactive links by cutting clocks and transceiver power. |
| 725 | */ |
| 726 | static void pullup(struct at91_udc *udc, int is_on) |
| 727 | { |
| 728 | if (!udc->enabled || !udc->vbus) |
| 729 | is_on = 0; |
| 730 | DBG("%sactive\n", is_on ? "" : "in"); |
| 731 | |
| 732 | if (is_on) { |
| 733 | clk_on(udc); |
| 734 | at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_RXRSM); |
| 735 | at91_udp_write(udc, AT91_UDP_TXVC, 0); |
| 736 | } else { |
| 737 | stop_activity(udc); |
| 738 | at91_udp_write(udc, AT91_UDP_IDR, AT91_UDP_RXRSM); |
| 739 | at91_udp_write(udc, AT91_UDP_TXVC, AT91_UDP_TXVC_TXVDIS); |
| 740 | clk_off(udc); |
| 741 | } |
| 742 | |
| 743 | if (udc->caps && udc->caps->pullup) |
| 744 | udc->caps->pullup(udc, is_on); |
| 745 | } |
| 746 | |
| 747 | /* vbus is here! turn everything on that's ready */ |
| 748 | static int at91_vbus_session(struct usb_gadget *gadget, int is_active) |
| 749 | { |
| 750 | struct at91_udc *udc = to_udc(gadget); |
| 751 | unsigned long flags; |
| 752 | |
| 753 | /* VDBG("vbus %s\n", is_active ? "on" : "off"); */ |
| 754 | spin_lock_irqsave(&udc->lock, flags); |
| 755 | udc->vbus = (is_active != 0); |
| 756 | if (udc->driver) |
| 757 | pullup(udc, is_active); |
| 758 | else |
| 759 | pullup(udc, 0); |
| 760 | spin_unlock_irqrestore(&udc->lock, flags); |
| 761 | return 0; |
| 762 | } |
| 763 | |
| 764 | static int at91_pullup(struct usb_gadget *gadget, int is_on) |
| 765 | { |
| 766 | struct at91_udc *udc = to_udc(gadget); |
| 767 | unsigned long flags; |
| 768 | |
| 769 | spin_lock_irqsave(&udc->lock, flags); |
| 770 | udc->enabled = is_on = !!is_on; |
| 771 | pullup(udc, is_on); |
| 772 | spin_unlock_irqrestore(&udc->lock, flags); |
| 773 | return 0; |
| 774 | } |
| 775 | |
| 776 | static int at91_set_selfpowered(struct usb_gadget *gadget, int is_on) |
| 777 | { |
| 778 | struct at91_udc *udc = to_udc(gadget); |
| 779 | unsigned long flags; |
| 780 | |
| 781 | spin_lock_irqsave(&udc->lock, flags); |
Heiko Schocher | 6201976 | 2015-09-08 11:52:51 +0200 | [diff] [blame] | 782 | udc->selfpowered = (is_on != 0); |
Heiko Schocher | 8ea1fbf | 2015-09-08 11:52:50 +0200 | [diff] [blame] | 783 | spin_unlock_irqrestore(&udc->lock, flags); |
| 784 | return 0; |
| 785 | } |
| 786 | |
| 787 | static int at91_start(struct usb_gadget *gadget, |
| 788 | struct usb_gadget_driver *driver); |
| 789 | static int at91_stop(struct usb_gadget *gadget); |
| 790 | |
| 791 | static const struct usb_gadget_ops at91_udc_ops = { |
| 792 | .get_frame = at91_get_frame, |
| 793 | .wakeup = at91_wakeup, |
| 794 | .set_selfpowered = at91_set_selfpowered, |
| 795 | .vbus_session = at91_vbus_session, |
| 796 | .pullup = at91_pullup, |
| 797 | .udc_start = at91_start, |
| 798 | .udc_stop = at91_stop, |
| 799 | |
| 800 | /* |
| 801 | * VBUS-powered devices may also also want to support bigger |
| 802 | * power budgets after an appropriate SET_CONFIGURATION. |
| 803 | */ |
| 804 | /* .vbus_power = at91_vbus_power, */ |
| 805 | }; |
| 806 | |
| 807 | /*-------------------------------------------------------------------------*/ |
| 808 | |
| 809 | static int handle_ep(struct at91_ep *ep) |
| 810 | { |
| 811 | struct at91_request *req; |
| 812 | u32 __iomem *creg = ep->creg; |
| 813 | u32 csr = __raw_readl(creg); |
| 814 | |
| 815 | if (!list_empty(&ep->queue)) |
| 816 | req = list_entry(ep->queue.next, |
| 817 | struct at91_request, queue); |
| 818 | else |
| 819 | req = NULL; |
| 820 | |
| 821 | if (ep->is_in) { |
| 822 | if (csr & (AT91_UDP_STALLSENT | AT91_UDP_TXCOMP)) { |
| 823 | csr |= CLR_FX; |
| 824 | csr &= ~(SET_FX | AT91_UDP_STALLSENT | AT91_UDP_TXCOMP); |
| 825 | __raw_writel(csr, creg); |
| 826 | } |
| 827 | if (req) |
| 828 | return write_fifo(ep, req); |
| 829 | |
| 830 | } else { |
| 831 | if (csr & AT91_UDP_STALLSENT) { |
| 832 | /* STALLSENT bit == ISOERR */ |
| 833 | if (ep->is_iso && req) |
| 834 | req->req.status = -EILSEQ; |
| 835 | csr |= CLR_FX; |
| 836 | csr &= ~(SET_FX | AT91_UDP_STALLSENT); |
| 837 | __raw_writel(csr, creg); |
| 838 | csr = __raw_readl(creg); |
| 839 | } |
| 840 | if (req && (csr & RX_DATA_READY)) |
| 841 | return read_fifo(ep, req); |
| 842 | } |
| 843 | return 0; |
| 844 | } |
| 845 | |
| 846 | union setup { |
| 847 | u8 raw[8]; |
| 848 | struct usb_ctrlrequest r; |
| 849 | }; |
| 850 | |
| 851 | static void handle_setup(struct at91_udc *udc, struct at91_ep *ep, u32 csr) |
| 852 | { |
| 853 | u32 __iomem *creg = ep->creg; |
| 854 | u8 __iomem *dreg = ep->creg + (AT91_UDP_FDR(0) - AT91_UDP_CSR(0)); |
| 855 | unsigned rxcount, i = 0; |
| 856 | u32 tmp; |
| 857 | union setup pkt; |
| 858 | int status = 0; |
| 859 | |
| 860 | /* read and ack SETUP; hard-fail for bogus packets */ |
| 861 | rxcount = (csr & AT91_UDP_RXBYTECNT) >> 16; |
| 862 | if (likely(rxcount == 8)) { |
| 863 | while (rxcount--) |
| 864 | pkt.raw[i++] = __raw_readb(dreg); |
| 865 | if (pkt.r.bRequestType & USB_DIR_IN) { |
| 866 | csr |= AT91_UDP_DIR; |
| 867 | ep->is_in = 1; |
| 868 | } else { |
| 869 | csr &= ~AT91_UDP_DIR; |
| 870 | ep->is_in = 0; |
| 871 | } |
| 872 | } else { |
| 873 | /* REVISIT this happens sometimes under load; why?? */ |
| 874 | ERR("SETUP len %d, csr %08x\n", rxcount, csr); |
| 875 | status = -EINVAL; |
| 876 | } |
| 877 | csr |= CLR_FX; |
| 878 | csr &= ~(SET_FX | AT91_UDP_RXSETUP); |
| 879 | __raw_writel(csr, creg); |
| 880 | udc->wait_for_addr_ack = 0; |
| 881 | udc->wait_for_config_ack = 0; |
| 882 | ep->stopped = 0; |
| 883 | if (unlikely(status != 0)) |
| 884 | goto stall; |
| 885 | |
| 886 | #define w_index le16_to_cpu(pkt.r.wIndex) |
| 887 | #define w_value le16_to_cpu(pkt.r.wValue) |
| 888 | #define w_length le16_to_cpu(pkt.r.wLength) |
| 889 | |
| 890 | VDBG("SETUP %02x.%02x v%04x i%04x l%04x\n", |
| 891 | pkt.r.bRequestType, pkt.r.bRequest, |
| 892 | w_value, w_index, w_length); |
| 893 | |
| 894 | /* |
| 895 | * A few standard requests get handled here, ones that touch |
| 896 | * hardware ... notably for device and endpoint features. |
| 897 | */ |
| 898 | udc->req_pending = 1; |
| 899 | csr = __raw_readl(creg); |
| 900 | csr |= CLR_FX; |
| 901 | csr &= ~SET_FX; |
| 902 | switch ((pkt.r.bRequestType << 8) | pkt.r.bRequest) { |
| 903 | |
| 904 | case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8) |
| 905 | | USB_REQ_SET_ADDRESS: |
| 906 | __raw_writel(csr | AT91_UDP_TXPKTRDY, creg); |
| 907 | udc->addr = w_value; |
| 908 | udc->wait_for_addr_ack = 1; |
| 909 | udc->req_pending = 0; |
| 910 | /* FADDR is set later, when we ack host STATUS */ |
| 911 | return; |
| 912 | |
| 913 | case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8) |
| 914 | | USB_REQ_SET_CONFIGURATION: |
| 915 | tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT) & AT91_UDP_CONFG; |
| 916 | if (pkt.r.wValue) |
| 917 | udc->wait_for_config_ack = (tmp == 0); |
| 918 | else |
| 919 | udc->wait_for_config_ack = (tmp != 0); |
| 920 | if (udc->wait_for_config_ack) |
| 921 | VDBG("wait for config\n"); |
| 922 | /* CONFG is toggled later, if gadget driver succeeds */ |
| 923 | break; |
| 924 | |
| 925 | /* |
| 926 | * Hosts may set or clear remote wakeup status, and |
| 927 | * devices may report they're VBUS powered. |
| 928 | */ |
| 929 | case ((USB_DIR_IN|USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8) |
| 930 | | USB_REQ_GET_STATUS: |
Heiko Schocher | 6201976 | 2015-09-08 11:52:51 +0200 | [diff] [blame] | 931 | tmp = (udc->selfpowered << USB_DEVICE_SELF_POWERED); |
Heiko Schocher | 8ea1fbf | 2015-09-08 11:52:50 +0200 | [diff] [blame] | 932 | if (at91_udp_read(udc, AT91_UDP_GLB_STAT) & AT91_UDP_ESR) |
| 933 | tmp |= (1 << USB_DEVICE_REMOTE_WAKEUP); |
| 934 | PACKET("get device status\n"); |
| 935 | __raw_writeb(tmp, dreg); |
| 936 | __raw_writeb(0, dreg); |
| 937 | goto write_in; |
| 938 | /* then STATUS starts later, automatically */ |
| 939 | case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8) |
| 940 | | USB_REQ_SET_FEATURE: |
| 941 | if (w_value != USB_DEVICE_REMOTE_WAKEUP) |
| 942 | goto stall; |
| 943 | tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT); |
| 944 | tmp |= AT91_UDP_ESR; |
| 945 | at91_udp_write(udc, AT91_UDP_GLB_STAT, tmp); |
| 946 | goto succeed; |
| 947 | case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8) |
| 948 | | USB_REQ_CLEAR_FEATURE: |
| 949 | if (w_value != USB_DEVICE_REMOTE_WAKEUP) |
| 950 | goto stall; |
| 951 | tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT); |
| 952 | tmp &= ~AT91_UDP_ESR; |
| 953 | at91_udp_write(udc, AT91_UDP_GLB_STAT, tmp); |
| 954 | goto succeed; |
| 955 | |
| 956 | /* |
| 957 | * Interfaces have no feature settings; this is pretty useless. |
| 958 | * we won't even insist the interface exists... |
| 959 | */ |
| 960 | case ((USB_DIR_IN|USB_TYPE_STANDARD|USB_RECIP_INTERFACE) << 8) |
| 961 | | USB_REQ_GET_STATUS: |
| 962 | PACKET("get interface status\n"); |
| 963 | __raw_writeb(0, dreg); |
| 964 | __raw_writeb(0, dreg); |
| 965 | goto write_in; |
| 966 | /* then STATUS starts later, automatically */ |
| 967 | case ((USB_TYPE_STANDARD|USB_RECIP_INTERFACE) << 8) |
| 968 | | USB_REQ_SET_FEATURE: |
| 969 | case ((USB_TYPE_STANDARD|USB_RECIP_INTERFACE) << 8) |
| 970 | | USB_REQ_CLEAR_FEATURE: |
| 971 | goto stall; |
| 972 | |
| 973 | /* |
| 974 | * Hosts may clear bulk/intr endpoint halt after the gadget |
| 975 | * driver sets it (not widely used); or set it (for testing) |
| 976 | */ |
| 977 | case ((USB_DIR_IN|USB_TYPE_STANDARD|USB_RECIP_ENDPOINT) << 8) |
| 978 | | USB_REQ_GET_STATUS: |
| 979 | tmp = w_index & USB_ENDPOINT_NUMBER_MASK; |
| 980 | ep = &udc->ep[tmp]; |
| 981 | if (tmp >= NUM_ENDPOINTS || (tmp && !ep->ep.desc)) |
| 982 | goto stall; |
| 983 | |
| 984 | if (tmp) { |
| 985 | if ((w_index & USB_DIR_IN)) { |
| 986 | if (!ep->is_in) |
| 987 | goto stall; |
| 988 | } else if (ep->is_in) |
| 989 | goto stall; |
| 990 | } |
| 991 | PACKET("get %s status\n", ep->ep.name); |
| 992 | if (__raw_readl(ep->creg) & AT91_UDP_FORCESTALL) |
| 993 | tmp = (1 << USB_ENDPOINT_HALT); |
| 994 | else |
| 995 | tmp = 0; |
| 996 | __raw_writeb(tmp, dreg); |
| 997 | __raw_writeb(0, dreg); |
| 998 | goto write_in; |
| 999 | /* then STATUS starts later, automatically */ |
| 1000 | case ((USB_TYPE_STANDARD|USB_RECIP_ENDPOINT) << 8) |
| 1001 | | USB_REQ_SET_FEATURE: |
| 1002 | tmp = w_index & USB_ENDPOINT_NUMBER_MASK; |
| 1003 | ep = &udc->ep[tmp]; |
| 1004 | if (w_value != USB_ENDPOINT_HALT || tmp >= NUM_ENDPOINTS) |
| 1005 | goto stall; |
| 1006 | if (!ep->ep.desc || ep->is_iso) |
| 1007 | goto stall; |
| 1008 | if ((w_index & USB_DIR_IN)) { |
| 1009 | if (!ep->is_in) |
| 1010 | goto stall; |
| 1011 | } else if (ep->is_in) |
| 1012 | goto stall; |
| 1013 | |
| 1014 | tmp = __raw_readl(ep->creg); |
| 1015 | tmp &= ~SET_FX; |
| 1016 | tmp |= CLR_FX | AT91_UDP_FORCESTALL; |
| 1017 | __raw_writel(tmp, ep->creg); |
| 1018 | goto succeed; |
| 1019 | case ((USB_TYPE_STANDARD|USB_RECIP_ENDPOINT) << 8) |
| 1020 | | USB_REQ_CLEAR_FEATURE: |
| 1021 | tmp = w_index & USB_ENDPOINT_NUMBER_MASK; |
| 1022 | ep = &udc->ep[tmp]; |
| 1023 | if (w_value != USB_ENDPOINT_HALT || tmp >= NUM_ENDPOINTS) |
| 1024 | goto stall; |
| 1025 | if (tmp == 0) |
| 1026 | goto succeed; |
| 1027 | if (!ep->ep.desc || ep->is_iso) |
| 1028 | goto stall; |
| 1029 | if ((w_index & USB_DIR_IN)) { |
| 1030 | if (!ep->is_in) |
| 1031 | goto stall; |
| 1032 | } else if (ep->is_in) |
| 1033 | goto stall; |
| 1034 | |
| 1035 | at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask); |
| 1036 | at91_udp_write(udc, AT91_UDP_RST_EP, 0); |
| 1037 | tmp = __raw_readl(ep->creg); |
| 1038 | tmp |= CLR_FX; |
| 1039 | tmp &= ~(SET_FX | AT91_UDP_FORCESTALL); |
| 1040 | __raw_writel(tmp, ep->creg); |
| 1041 | if (!list_empty(&ep->queue)) |
| 1042 | handle_ep(ep); |
| 1043 | goto succeed; |
| 1044 | } |
| 1045 | |
| 1046 | #undef w_value |
| 1047 | #undef w_index |
| 1048 | #undef w_length |
| 1049 | |
| 1050 | /* pass request up to the gadget driver */ |
| 1051 | if (udc->driver) { |
| 1052 | spin_unlock(&udc->lock); |
| 1053 | status = udc->driver->setup(&udc->gadget, &pkt.r); |
| 1054 | spin_lock(&udc->lock); |
| 1055 | } |
| 1056 | else |
| 1057 | status = -ENODEV; |
| 1058 | if (status < 0) { |
| 1059 | stall: |
| 1060 | VDBG("req %02x.%02x protocol STALL; stat %d\n", |
| 1061 | pkt.r.bRequestType, pkt.r.bRequest, status); |
| 1062 | csr |= AT91_UDP_FORCESTALL; |
| 1063 | __raw_writel(csr, creg); |
| 1064 | udc->req_pending = 0; |
| 1065 | } |
| 1066 | return; |
| 1067 | |
| 1068 | succeed: |
| 1069 | /* immediate successful (IN) STATUS after zero length DATA */ |
| 1070 | PACKET("ep0 in/status\n"); |
| 1071 | write_in: |
| 1072 | csr |= AT91_UDP_TXPKTRDY; |
| 1073 | __raw_writel(csr, creg); |
| 1074 | udc->req_pending = 0; |
| 1075 | } |
| 1076 | |
| 1077 | static void handle_ep0(struct at91_udc *udc) |
| 1078 | { |
| 1079 | struct at91_ep *ep0 = &udc->ep[0]; |
| 1080 | u32 __iomem *creg = ep0->creg; |
| 1081 | u32 csr = __raw_readl(creg); |
| 1082 | struct at91_request *req; |
| 1083 | |
| 1084 | if (unlikely(csr & AT91_UDP_STALLSENT)) { |
| 1085 | nuke(ep0, -EPROTO); |
| 1086 | udc->req_pending = 0; |
| 1087 | csr |= CLR_FX; |
| 1088 | csr &= ~(SET_FX | AT91_UDP_STALLSENT | AT91_UDP_FORCESTALL); |
| 1089 | __raw_writel(csr, creg); |
| 1090 | VDBG("ep0 stalled\n"); |
| 1091 | csr = __raw_readl(creg); |
| 1092 | } |
| 1093 | if (csr & AT91_UDP_RXSETUP) { |
| 1094 | nuke(ep0, 0); |
| 1095 | udc->req_pending = 0; |
| 1096 | handle_setup(udc, ep0, csr); |
| 1097 | return; |
| 1098 | } |
| 1099 | |
| 1100 | if (list_empty(&ep0->queue)) |
| 1101 | req = NULL; |
| 1102 | else |
| 1103 | req = list_entry(ep0->queue.next, struct at91_request, queue); |
| 1104 | |
| 1105 | /* host ACKed an IN packet that we sent */ |
| 1106 | if (csr & AT91_UDP_TXCOMP) { |
| 1107 | csr |= CLR_FX; |
| 1108 | csr &= ~(SET_FX | AT91_UDP_TXCOMP); |
| 1109 | |
| 1110 | /* write more IN DATA? */ |
| 1111 | if (req && ep0->is_in) { |
| 1112 | if (handle_ep(ep0)) |
| 1113 | udc->req_pending = 0; |
| 1114 | |
| 1115 | /* |
| 1116 | * Ack after: |
| 1117 | * - last IN DATA packet (including GET_STATUS) |
| 1118 | * - IN/STATUS for OUT DATA |
| 1119 | * - IN/STATUS for any zero-length DATA stage |
| 1120 | * except for the IN DATA case, the host should send |
| 1121 | * an OUT status later, which we'll ack. |
| 1122 | */ |
| 1123 | } else { |
| 1124 | udc->req_pending = 0; |
| 1125 | __raw_writel(csr, creg); |
| 1126 | |
| 1127 | /* |
| 1128 | * SET_ADDRESS takes effect only after the STATUS |
| 1129 | * (to the original address) gets acked. |
| 1130 | */ |
| 1131 | if (udc->wait_for_addr_ack) { |
| 1132 | u32 tmp; |
| 1133 | |
| 1134 | at91_udp_write(udc, AT91_UDP_FADDR, |
| 1135 | AT91_UDP_FEN | udc->addr); |
| 1136 | tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT); |
| 1137 | tmp &= ~AT91_UDP_FADDEN; |
| 1138 | if (udc->addr) |
| 1139 | tmp |= AT91_UDP_FADDEN; |
| 1140 | at91_udp_write(udc, AT91_UDP_GLB_STAT, tmp); |
| 1141 | |
| 1142 | udc->wait_for_addr_ack = 0; |
| 1143 | VDBG("address %d\n", udc->addr); |
| 1144 | } |
| 1145 | } |
| 1146 | } |
| 1147 | |
| 1148 | /* OUT packet arrived ... */ |
| 1149 | else if (csr & AT91_UDP_RX_DATA_BK0) { |
| 1150 | csr |= CLR_FX; |
| 1151 | csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK0); |
| 1152 | |
| 1153 | /* OUT DATA stage */ |
| 1154 | if (!ep0->is_in) { |
| 1155 | if (req) { |
| 1156 | if (handle_ep(ep0)) { |
| 1157 | /* send IN/STATUS */ |
| 1158 | PACKET("ep0 in/status\n"); |
| 1159 | csr = __raw_readl(creg); |
| 1160 | csr &= ~SET_FX; |
| 1161 | csr |= CLR_FX | AT91_UDP_TXPKTRDY; |
| 1162 | __raw_writel(csr, creg); |
| 1163 | udc->req_pending = 0; |
| 1164 | } |
| 1165 | } else if (udc->req_pending) { |
| 1166 | /* |
| 1167 | * AT91 hardware has a hard time with this |
| 1168 | * "deferred response" mode for control-OUT |
| 1169 | * transfers. (For control-IN it's fine.) |
| 1170 | * |
| 1171 | * The normal solution leaves OUT data in the |
| 1172 | * fifo until the gadget driver is ready. |
| 1173 | * We couldn't do that here without disabling |
| 1174 | * the IRQ that tells about SETUP packets, |
| 1175 | * e.g. when the host gets impatient... |
| 1176 | * |
| 1177 | * Working around it by copying into a buffer |
| 1178 | * would almost be a non-deferred response, |
| 1179 | * except that it wouldn't permit reliable |
| 1180 | * stalling of the request. Instead, demand |
| 1181 | * that gadget drivers not use this mode. |
| 1182 | */ |
| 1183 | DBG("no control-OUT deferred responses!\n"); |
| 1184 | __raw_writel(csr | AT91_UDP_FORCESTALL, creg); |
| 1185 | udc->req_pending = 0; |
| 1186 | } |
| 1187 | |
| 1188 | /* STATUS stage for control-IN; ack. */ |
| 1189 | } else { |
| 1190 | PACKET("ep0 out/status ACK\n"); |
| 1191 | __raw_writel(csr, creg); |
| 1192 | |
| 1193 | /* "early" status stage */ |
| 1194 | if (req) |
| 1195 | done(ep0, req, 0); |
| 1196 | } |
| 1197 | } |
| 1198 | } |
| 1199 | |
Heiko Schocher | 6201976 | 2015-09-08 11:52:51 +0200 | [diff] [blame] | 1200 | static irqreturn_t at91_udc_irq(struct at91_udc *udc) |
Heiko Schocher | 8ea1fbf | 2015-09-08 11:52:50 +0200 | [diff] [blame] | 1201 | { |
Heiko Schocher | 8ea1fbf | 2015-09-08 11:52:50 +0200 | [diff] [blame] | 1202 | u32 rescans = 5; |
| 1203 | int disable_clock = 0; |
| 1204 | unsigned long flags; |
| 1205 | |
| 1206 | spin_lock_irqsave(&udc->lock, flags); |
| 1207 | |
| 1208 | if (!udc->clocked) { |
| 1209 | clk_on(udc); |
| 1210 | disable_clock = 1; |
| 1211 | } |
| 1212 | |
| 1213 | while (rescans--) { |
| 1214 | u32 status; |
| 1215 | |
| 1216 | status = at91_udp_read(udc, AT91_UDP_ISR) |
| 1217 | & at91_udp_read(udc, AT91_UDP_IMR); |
| 1218 | if (!status) |
| 1219 | break; |
| 1220 | |
| 1221 | /* USB reset irq: not maskable */ |
| 1222 | if (status & AT91_UDP_ENDBUSRES) { |
| 1223 | at91_udp_write(udc, AT91_UDP_IDR, ~MINIMUS_INTERRUPTUS); |
| 1224 | at91_udp_write(udc, AT91_UDP_IER, MINIMUS_INTERRUPTUS); |
| 1225 | /* Atmel code clears this irq twice */ |
| 1226 | at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_ENDBUSRES); |
| 1227 | at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_ENDBUSRES); |
| 1228 | VDBG("end bus reset\n"); |
| 1229 | udc->addr = 0; |
| 1230 | reset_gadget(udc); |
| 1231 | |
| 1232 | /* enable ep0 */ |
| 1233 | at91_udp_write(udc, AT91_UDP_CSR(0), |
| 1234 | AT91_UDP_EPEDS | AT91_UDP_EPTYPE_CTRL); |
| 1235 | udc->gadget.speed = USB_SPEED_FULL; |
| 1236 | udc->suspended = 0; |
| 1237 | at91_udp_write(udc, AT91_UDP_IER, AT91_UDP_EP(0)); |
| 1238 | |
| 1239 | /* |
| 1240 | * NOTE: this driver keeps clocks off unless the |
| 1241 | * USB host is present. That saves power, but for |
| 1242 | * boards that don't support VBUS detection, both |
| 1243 | * clocks need to be active most of the time. |
| 1244 | */ |
| 1245 | |
| 1246 | /* host initiated suspend (3+ms bus idle) */ |
| 1247 | } else if (status & AT91_UDP_RXSUSP) { |
| 1248 | at91_udp_write(udc, AT91_UDP_IDR, AT91_UDP_RXSUSP); |
| 1249 | at91_udp_write(udc, AT91_UDP_IER, AT91_UDP_RXRSM); |
| 1250 | at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_RXSUSP); |
| 1251 | /* VDBG("bus suspend\n"); */ |
| 1252 | if (udc->suspended) |
| 1253 | continue; |
| 1254 | udc->suspended = 1; |
| 1255 | |
| 1256 | /* |
| 1257 | * NOTE: when suspending a VBUS-powered device, the |
| 1258 | * gadget driver should switch into slow clock mode |
| 1259 | * and then into standby to avoid drawing more than |
| 1260 | * 500uA power (2500uA for some high-power configs). |
| 1261 | */ |
| 1262 | if (udc->driver && udc->driver->suspend) { |
| 1263 | spin_unlock(&udc->lock); |
| 1264 | udc->driver->suspend(&udc->gadget); |
| 1265 | spin_lock(&udc->lock); |
| 1266 | } |
| 1267 | |
| 1268 | /* host initiated resume */ |
| 1269 | } else if (status & AT91_UDP_RXRSM) { |
| 1270 | at91_udp_write(udc, AT91_UDP_IDR, AT91_UDP_RXRSM); |
| 1271 | at91_udp_write(udc, AT91_UDP_IER, AT91_UDP_RXSUSP); |
| 1272 | at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_RXRSM); |
| 1273 | /* VDBG("bus resume\n"); */ |
| 1274 | if (!udc->suspended) |
| 1275 | continue; |
| 1276 | udc->suspended = 0; |
| 1277 | |
| 1278 | /* |
| 1279 | * NOTE: for a VBUS-powered device, the gadget driver |
| 1280 | * would normally want to switch out of slow clock |
| 1281 | * mode into normal mode. |
| 1282 | */ |
| 1283 | if (udc->driver && udc->driver->resume) { |
| 1284 | spin_unlock(&udc->lock); |
| 1285 | udc->driver->resume(&udc->gadget); |
| 1286 | spin_lock(&udc->lock); |
| 1287 | } |
| 1288 | |
| 1289 | /* endpoint IRQs are cleared by handling them */ |
| 1290 | } else { |
| 1291 | int i; |
| 1292 | unsigned mask = 1; |
| 1293 | struct at91_ep *ep = &udc->ep[1]; |
| 1294 | |
| 1295 | if (status & mask) |
| 1296 | handle_ep0(udc); |
| 1297 | for (i = 1; i < NUM_ENDPOINTS; i++) { |
| 1298 | mask <<= 1; |
| 1299 | if (status & mask) |
| 1300 | handle_ep(ep); |
| 1301 | ep++; |
| 1302 | } |
| 1303 | } |
| 1304 | } |
| 1305 | |
| 1306 | if (disable_clock) |
| 1307 | clk_off(udc); |
| 1308 | |
| 1309 | spin_unlock_irqrestore(&udc->lock, flags); |
| 1310 | |
| 1311 | return IRQ_HANDLED; |
| 1312 | } |
| 1313 | |
| 1314 | /*-------------------------------------------------------------------------*/ |
| 1315 | |
Heiko Schocher | 8ea1fbf | 2015-09-08 11:52:50 +0200 | [diff] [blame] | 1316 | static int at91_start(struct usb_gadget *gadget, |
| 1317 | struct usb_gadget_driver *driver) |
| 1318 | { |
Heiko Schocher | 6201976 | 2015-09-08 11:52:51 +0200 | [diff] [blame] | 1319 | struct at91_udc *udc = controller; |
Heiko Schocher | 8ea1fbf | 2015-09-08 11:52:50 +0200 | [diff] [blame] | 1320 | |
Heiko Schocher | 8ea1fbf | 2015-09-08 11:52:50 +0200 | [diff] [blame] | 1321 | udc->driver = driver; |
Heiko Schocher | 8ea1fbf | 2015-09-08 11:52:50 +0200 | [diff] [blame] | 1322 | udc->enabled = 1; |
Heiko Schocher | 6201976 | 2015-09-08 11:52:51 +0200 | [diff] [blame] | 1323 | udc->selfpowered = 1; |
Heiko Schocher | 8ea1fbf | 2015-09-08 11:52:50 +0200 | [diff] [blame] | 1324 | |
| 1325 | return 0; |
| 1326 | } |
| 1327 | |
| 1328 | static int at91_stop(struct usb_gadget *gadget) |
| 1329 | { |
Heiko Schocher | 6201976 | 2015-09-08 11:52:51 +0200 | [diff] [blame] | 1330 | struct at91_udc *udc = controller; |
Heiko Schocher | 8ea1fbf | 2015-09-08 11:52:50 +0200 | [diff] [blame] | 1331 | unsigned long flags; |
| 1332 | |
Heiko Schocher | 8ea1fbf | 2015-09-08 11:52:50 +0200 | [diff] [blame] | 1333 | spin_lock_irqsave(&udc->lock, flags); |
| 1334 | udc->enabled = 0; |
| 1335 | at91_udp_write(udc, AT91_UDP_IDR, ~0); |
| 1336 | spin_unlock_irqrestore(&udc->lock, flags); |
| 1337 | |
| 1338 | udc->driver = NULL; |
| 1339 | |
| 1340 | return 0; |
| 1341 | } |
| 1342 | |
| 1343 | /*-------------------------------------------------------------------------*/ |
| 1344 | |
Heiko Schocher | 2fa5130 | 2017-06-23 20:13:58 +0200 | [diff] [blame] | 1345 | #if defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9G20) |
Heiko Schocher | 8ea1fbf | 2015-09-08 11:52:50 +0200 | [diff] [blame] | 1346 | static int at91sam9260_udc_init(struct at91_udc *udc) |
| 1347 | { |
| 1348 | struct at91_ep *ep; |
| 1349 | int i; |
| 1350 | |
| 1351 | for (i = 0; i < NUM_ENDPOINTS; i++) { |
| 1352 | ep = &udc->ep[i]; |
| 1353 | |
| 1354 | switch (i) { |
| 1355 | case 0 ... 3: |
| 1356 | ep->maxpacket = 64; |
| 1357 | break; |
| 1358 | case 4 ... 5: |
| 1359 | ep->maxpacket = 512; |
| 1360 | break; |
| 1361 | } |
| 1362 | } |
| 1363 | |
| 1364 | return 0; |
| 1365 | } |
| 1366 | |
| 1367 | static void at91sam9260_udc_pullup(struct at91_udc *udc, int is_on) |
| 1368 | { |
| 1369 | u32 txvc = at91_udp_read(udc, AT91_UDP_TXVC); |
| 1370 | |
| 1371 | if (is_on) |
| 1372 | txvc |= AT91_UDP_TXVC_PUON; |
| 1373 | else |
| 1374 | txvc &= ~AT91_UDP_TXVC_PUON; |
| 1375 | |
| 1376 | at91_udp_write(udc, AT91_UDP_TXVC, txvc); |
| 1377 | } |
| 1378 | |
| 1379 | static const struct at91_udc_caps at91sam9260_udc_caps = { |
| 1380 | .init = at91sam9260_udc_init, |
| 1381 | .pullup = at91sam9260_udc_pullup, |
| 1382 | }; |
Heiko Schocher | 6201976 | 2015-09-08 11:52:51 +0200 | [diff] [blame] | 1383 | #endif |
Heiko Schocher | 8ea1fbf | 2015-09-08 11:52:50 +0200 | [diff] [blame] | 1384 | |
Heiko Schocher | 6201976 | 2015-09-08 11:52:51 +0200 | [diff] [blame] | 1385 | #if defined(CONFIG_AT91SAM9261) |
Heiko Schocher | 8ea1fbf | 2015-09-08 11:52:50 +0200 | [diff] [blame] | 1386 | static int at91sam9261_udc_init(struct at91_udc *udc) |
| 1387 | { |
| 1388 | struct at91_ep *ep; |
| 1389 | int i; |
| 1390 | |
| 1391 | for (i = 0; i < NUM_ENDPOINTS; i++) { |
| 1392 | ep = &udc->ep[i]; |
| 1393 | |
| 1394 | switch (i) { |
| 1395 | case 0: |
| 1396 | ep->maxpacket = 8; |
| 1397 | break; |
| 1398 | case 1 ... 3: |
| 1399 | ep->maxpacket = 64; |
| 1400 | break; |
| 1401 | case 4 ... 5: |
| 1402 | ep->maxpacket = 256; |
| 1403 | break; |
| 1404 | } |
| 1405 | } |
| 1406 | |
Heiko Schocher | 6201976 | 2015-09-08 11:52:51 +0200 | [diff] [blame] | 1407 | udc->matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX; |
| 1408 | |
Heiko Schocher | 8ea1fbf | 2015-09-08 11:52:50 +0200 | [diff] [blame] | 1409 | if (IS_ERR(udc->matrix)) |
| 1410 | return PTR_ERR(udc->matrix); |
| 1411 | |
| 1412 | return 0; |
| 1413 | } |
| 1414 | |
| 1415 | static void at91sam9261_udc_pullup(struct at91_udc *udc, int is_on) |
| 1416 | { |
| 1417 | u32 usbpucr = 0; |
| 1418 | |
Heiko Schocher | 6201976 | 2015-09-08 11:52:51 +0200 | [diff] [blame] | 1419 | usbpucr = readl(&udc->matrix->pucr); |
Heiko Schocher | 8ea1fbf | 2015-09-08 11:52:50 +0200 | [diff] [blame] | 1420 | if (is_on) |
Heiko Schocher | 6201976 | 2015-09-08 11:52:51 +0200 | [diff] [blame] | 1421 | usbpucr |= AT91_MATRIX_USBPUCR_PUON; |
Heiko Schocher | 8ea1fbf | 2015-09-08 11:52:50 +0200 | [diff] [blame] | 1422 | |
Heiko Schocher | 6201976 | 2015-09-08 11:52:51 +0200 | [diff] [blame] | 1423 | writel(usbpucr, &udc->matrix->pucr); |
Heiko Schocher | 8ea1fbf | 2015-09-08 11:52:50 +0200 | [diff] [blame] | 1424 | } |
| 1425 | |
| 1426 | static const struct at91_udc_caps at91sam9261_udc_caps = { |
| 1427 | .init = at91sam9261_udc_init, |
| 1428 | .pullup = at91sam9261_udc_pullup, |
| 1429 | }; |
Heiko Schocher | 6201976 | 2015-09-08 11:52:51 +0200 | [diff] [blame] | 1430 | #endif |
Heiko Schocher | 8ea1fbf | 2015-09-08 11:52:50 +0200 | [diff] [blame] | 1431 | |
Heiko Schocher | 6201976 | 2015-09-08 11:52:51 +0200 | [diff] [blame] | 1432 | int usb_gadget_handle_interrupts(int index) |
Heiko Schocher | 8ea1fbf | 2015-09-08 11:52:50 +0200 | [diff] [blame] | 1433 | { |
Heiko Schocher | 6201976 | 2015-09-08 11:52:51 +0200 | [diff] [blame] | 1434 | struct at91_udc *udc = controller; |
Heiko Schocher | 8ea1fbf | 2015-09-08 11:52:50 +0200 | [diff] [blame] | 1435 | |
Heiko Schocher | 6201976 | 2015-09-08 11:52:51 +0200 | [diff] [blame] | 1436 | return at91_udc_irq(udc); |
Heiko Schocher | 8ea1fbf | 2015-09-08 11:52:50 +0200 | [diff] [blame] | 1437 | } |
| 1438 | |
Heiko Schocher | 6201976 | 2015-09-08 11:52:51 +0200 | [diff] [blame] | 1439 | int usb_gadget_register_driver(struct usb_gadget_driver *driver) |
Heiko Schocher | 8ea1fbf | 2015-09-08 11:52:50 +0200 | [diff] [blame] | 1440 | { |
Heiko Schocher | 6201976 | 2015-09-08 11:52:51 +0200 | [diff] [blame] | 1441 | struct at91_udc *udc = controller; |
| 1442 | int ret; |
| 1443 | |
| 1444 | if (!driver || !driver->bind || !driver->setup) { |
| 1445 | printf("bad paramter\n"); |
| 1446 | return -EINVAL; |
| 1447 | } |
| 1448 | |
| 1449 | if (udc->driver) { |
| 1450 | printf("UDC already has a gadget driver\n"); |
| 1451 | return -EBUSY; |
| 1452 | } |
| 1453 | |
| 1454 | at91_start(&udc->gadget, driver); |
| 1455 | |
| 1456 | udc->driver = driver; |
| 1457 | |
| 1458 | ret = driver->bind(&udc->gadget); |
| 1459 | if (ret) { |
Masahiro Yamada | 9b643e3 | 2017-09-16 14:10:41 +0900 | [diff] [blame] | 1460 | pr_err("driver->bind() returned %d\n", ret); |
Heiko Schocher | 6201976 | 2015-09-08 11:52:51 +0200 | [diff] [blame] | 1461 | udc->driver = NULL; |
| 1462 | } |
| 1463 | |
| 1464 | return ret; |
| 1465 | } |
| 1466 | |
| 1467 | int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) |
| 1468 | { |
| 1469 | struct at91_udc *udc = controller; |
| 1470 | |
| 1471 | if (!driver || !driver->unbind || !driver->disconnect) { |
Masahiro Yamada | 9b643e3 | 2017-09-16 14:10:41 +0900 | [diff] [blame] | 1472 | pr_err("bad paramter\n"); |
Heiko Schocher | 6201976 | 2015-09-08 11:52:51 +0200 | [diff] [blame] | 1473 | return -EINVAL; |
| 1474 | } |
| 1475 | |
| 1476 | driver->disconnect(&udc->gadget); |
| 1477 | driver->unbind(&udc->gadget); |
| 1478 | udc->driver = NULL; |
| 1479 | |
| 1480 | at91_stop(&udc->gadget); |
| 1481 | |
| 1482 | return 0; |
| 1483 | } |
| 1484 | |
| 1485 | int at91_udc_probe(struct at91_udc_data *pdata) |
| 1486 | { |
Heiko Schocher | 8ea1fbf | 2015-09-08 11:52:50 +0200 | [diff] [blame] | 1487 | struct at91_udc *udc; |
| 1488 | int retval; |
Heiko Schocher | 8ea1fbf | 2015-09-08 11:52:50 +0200 | [diff] [blame] | 1489 | struct at91_ep *ep; |
| 1490 | int i; |
| 1491 | |
Heiko Schocher | 6201976 | 2015-09-08 11:52:51 +0200 | [diff] [blame] | 1492 | udc = kzalloc(sizeof(*udc), GFP_KERNEL); |
Heiko Schocher | 8ea1fbf | 2015-09-08 11:52:50 +0200 | [diff] [blame] | 1493 | if (!udc) |
| 1494 | return -ENOMEM; |
| 1495 | |
Heiko Schocher | 6201976 | 2015-09-08 11:52:51 +0200 | [diff] [blame] | 1496 | controller = udc; |
| 1497 | memcpy(&udc->board, pdata, sizeof(struct at91_udc_data)); |
| 1498 | if (udc->board.vbus_pin) { |
| 1499 | printf("%s: gpio vbus pin not supported yet.\n", __func__); |
| 1500 | return -ENXIO; |
| 1501 | } else { |
| 1502 | DBG("no VBUS detection, assuming always-on\n"); |
| 1503 | udc->vbus = 1; |
| 1504 | } |
| 1505 | |
| 1506 | #if defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9G20) |
| 1507 | udc->caps = &at91sam9260_udc_caps; |
| 1508 | #endif |
| 1509 | |
Heiko Schocher | 8ea1fbf | 2015-09-08 11:52:50 +0200 | [diff] [blame] | 1510 | udc->enabled = 0; |
| 1511 | spin_lock_init(&udc->lock); |
| 1512 | |
| 1513 | udc->gadget.ops = &at91_udc_ops; |
| 1514 | udc->gadget.ep0 = &udc->ep[0].ep; |
| 1515 | udc->gadget.name = driver_name; |
Heiko Schocher | 8ea1fbf | 2015-09-08 11:52:50 +0200 | [diff] [blame] | 1516 | |
| 1517 | for (i = 0; i < NUM_ENDPOINTS; i++) { |
| 1518 | ep = &udc->ep[i]; |
| 1519 | ep->ep.name = ep_names[i]; |
| 1520 | ep->ep.ops = &at91_ep_ops; |
| 1521 | ep->udc = udc; |
Heiko Schocher | 6201976 | 2015-09-08 11:52:51 +0200 | [diff] [blame] | 1522 | ep->int_mask = (1 << i); |
Heiko Schocher | 8ea1fbf | 2015-09-08 11:52:50 +0200 | [diff] [blame] | 1523 | if (i != 0 && i != 3) |
| 1524 | ep->is_pingpong = 1; |
| 1525 | } |
| 1526 | |
Heiko Schocher | 6201976 | 2015-09-08 11:52:51 +0200 | [diff] [blame] | 1527 | udc->udp_baseaddr = (void *)udc->board.baseaddr; |
Heiko Schocher | 8ea1fbf | 2015-09-08 11:52:50 +0200 | [diff] [blame] | 1528 | if (IS_ERR(udc->udp_baseaddr)) |
| 1529 | return PTR_ERR(udc->udp_baseaddr); |
| 1530 | |
| 1531 | if (udc->caps && udc->caps->init) { |
| 1532 | retval = udc->caps->init(udc); |
| 1533 | if (retval) |
| 1534 | return retval; |
| 1535 | } |
| 1536 | |
| 1537 | udc_reinit(udc); |
| 1538 | |
Heiko Schocher | 8ea1fbf | 2015-09-08 11:52:50 +0200 | [diff] [blame] | 1539 | at91_udp_write(udc, AT91_UDP_TXVC, AT91_UDP_TXVC_TXVDIS); |
| 1540 | at91_udp_write(udc, AT91_UDP_IDR, 0xffffffff); |
| 1541 | /* Clear all pending interrupts - UDP may be used by bootloader. */ |
| 1542 | at91_udp_write(udc, AT91_UDP_ICR, 0xffffffff); |
Heiko Schocher | 8ea1fbf | 2015-09-08 11:52:50 +0200 | [diff] [blame] | 1543 | |
| 1544 | INFO("%s version %s\n", driver_name, DRIVER_VERSION); |
| 1545 | return 0; |
Heiko Schocher | 8ea1fbf | 2015-09-08 11:52:50 +0200 | [diff] [blame] | 1546 | } |