blob: 88747b874e1fa1729e76df282e39d137a5e5d2d6 [file] [log] [blame]
wdenkc6097192002-11-03 00:24:07 +00001/*
2 * (C) Copyright 2001
3 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/*
25 * This provides a bit-banged interface to the ethernet MII management
26 * channel.
27 */
28
29#include <common.h>
30#include <miiphy.h>
Andy Fleming5f184712011-04-08 02:10:27 -050031#include <phy.h>
wdenkc6097192002-11-03 00:24:07 +000032
Marian Balakowicz63ff0042005-10-28 22:30:33 +020033#include <asm/types.h>
34#include <linux/list.h>
35#include <malloc.h>
36#include <net.h>
37
38/* local debug macro */
Marian Balakowicz63ff0042005-10-28 22:30:33 +020039#undef MII_DEBUG
40
41#undef debug
42#ifdef MII_DEBUG
Andy Fleming16a53232011-04-07 14:38:35 -050043#define debug(fmt, args...) printf(fmt, ##args)
Marian Balakowicz63ff0042005-10-28 22:30:33 +020044#else
Andy Fleming16a53232011-04-07 14:38:35 -050045#define debug(fmt, args...)
Marian Balakowicz63ff0042005-10-28 22:30:33 +020046#endif /* MII_DEBUG */
47
Marian Balakowicz63ff0042005-10-28 22:30:33 +020048static struct list_head mii_devs;
49static struct mii_dev *current_mii;
50
Mike Frysinger0daac972010-07-27 18:35:09 -040051/*
52 * Lookup the mii_dev struct by the registered device name.
53 */
Andy Fleming5f184712011-04-08 02:10:27 -050054struct mii_dev *miiphy_get_dev_by_name(const char *devname)
Mike Frysinger0daac972010-07-27 18:35:09 -040055{
56 struct list_head *entry;
57 struct mii_dev *dev;
58
59 if (!devname) {
60 printf("NULL device name!\n");
61 return NULL;
62 }
63
64 list_for_each(entry, &mii_devs) {
65 dev = list_entry(entry, struct mii_dev, link);
66 if (strcmp(dev->name, devname) == 0)
67 return dev;
68 }
69
Mike Frysinger0daac972010-07-27 18:35:09 -040070 return NULL;
71}
72
Marian Balakowicz63ff0042005-10-28 22:30:33 +020073/*****************************************************************************
74 *
Marian Balakowiczd9785c12005-11-30 18:06:04 +010075 * Initialize global data. Need to be called before any other miiphy routine.
76 */
Mike Frysinger5700bb62010-07-27 18:35:08 -040077void miiphy_init(void)
Marian Balakowiczd9785c12005-11-30 18:06:04 +010078{
Andy Fleming16a53232011-04-07 14:38:35 -050079 INIT_LIST_HEAD(&mii_devs);
Larry Johnson298035d2007-10-31 11:21:29 -050080 current_mii = NULL;
Marian Balakowiczd9785c12005-11-30 18:06:04 +010081}
82
Andy Fleming5f184712011-04-08 02:10:27 -050083static int legacy_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg)
84{
85 unsigned short val;
86 int ret;
87 struct legacy_mii_dev *ldev = bus->priv;
88
89 ret = ldev->read(bus->name, addr, reg, &val);
90
91 return ret ? -1 : (int)val;
92}
93
94static int legacy_miiphy_write(struct mii_dev *bus, int addr, int devad,
95 int reg, u16 val)
96{
97 struct legacy_mii_dev *ldev = bus->priv;
98
99 return ldev->write(bus->name, addr, reg, val);
100}
101
Marian Balakowiczd9785c12005-11-30 18:06:04 +0100102/*****************************************************************************
103 *
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200104 * Register read and write MII access routines for the device <name>.
Andy Fleming1cdabc42011-10-31 09:46:13 -0500105 * This API is now deprecated. Please use mdio_alloc and mdio_register, instead.
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200106 */
Mike Frysinger5700bb62010-07-27 18:35:08 -0400107void miiphy_register(const char *name,
Andy Fleming16a53232011-04-07 14:38:35 -0500108 int (*read)(const char *devname, unsigned char addr,
Chandan Nath5c45a222011-09-21 01:10:32 +0000109 unsigned short reg, unsigned short *value),
Andy Fleming16a53232011-04-07 14:38:35 -0500110 int (*write)(const char *devname, unsigned char addr,
Chandan Nath5c45a222011-09-21 01:10:32 +0000111 unsigned short reg, unsigned short value))
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200112{
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200113 struct mii_dev *new_dev;
Andy Fleming5f184712011-04-08 02:10:27 -0500114 struct legacy_mii_dev *ldev;
Laurence Withers07c07632011-07-14 23:21:45 +0000115
116 BUG_ON(strlen(name) >= MDIO_NAME_LEN);
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200117
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200118 /* check if we have unique name */
Andy Fleming5f184712011-04-08 02:10:27 -0500119 new_dev = miiphy_get_dev_by_name(name);
Mike Frysinger0daac972010-07-27 18:35:09 -0400120 if (new_dev) {
121 printf("miiphy_register: non unique device name '%s'\n", name);
122 return;
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200123 }
124
125 /* allocate memory */
Andy Fleming5f184712011-04-08 02:10:27 -0500126 new_dev = mdio_alloc();
127 ldev = malloc(sizeof(*ldev));
128
129 if (new_dev == NULL || ldev == NULL) {
Andy Fleming16a53232011-04-07 14:38:35 -0500130 printf("miiphy_register: cannot allocate memory for '%s'\n",
Larry Johnson298035d2007-10-31 11:21:29 -0500131 name);
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200132 return;
133 }
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200134
135 /* initalize mii_dev struct fields */
Andy Fleming5f184712011-04-08 02:10:27 -0500136 new_dev->read = legacy_miiphy_read;
137 new_dev->write = legacy_miiphy_write;
Laurence Withers07c07632011-07-14 23:21:45 +0000138 strncpy(new_dev->name, name, MDIO_NAME_LEN);
139 new_dev->name[MDIO_NAME_LEN - 1] = 0;
Andy Fleming5f184712011-04-08 02:10:27 -0500140 ldev->read = read;
141 ldev->write = write;
142 new_dev->priv = ldev;
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200143
Andy Fleming16a53232011-04-07 14:38:35 -0500144 debug("miiphy_register: added '%s', read=0x%08lx, write=0x%08lx\n",
Andy Fleming5f184712011-04-08 02:10:27 -0500145 new_dev->name, ldev->read, ldev->write);
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200146
147 /* add it to the list */
Andy Fleming16a53232011-04-07 14:38:35 -0500148 list_add_tail(&new_dev->link, &mii_devs);
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200149
150 if (!current_mii)
151 current_mii = new_dev;
152}
153
Andy Fleming5f184712011-04-08 02:10:27 -0500154struct mii_dev *mdio_alloc(void)
155{
156 struct mii_dev *bus;
157
158 bus = malloc(sizeof(*bus));
159 if (!bus)
160 return bus;
161
162 memset(bus, 0, sizeof(*bus));
163
164 /* initalize mii_dev struct fields */
165 INIT_LIST_HEAD(&bus->link);
166
167 return bus;
168}
169
170int mdio_register(struct mii_dev *bus)
171{
172 if (!bus || !bus->name || !bus->read || !bus->write)
173 return -1;
174
175 /* check if we have unique name */
176 if (miiphy_get_dev_by_name(bus->name)) {
177 printf("mdio_register: non unique device name '%s'\n",
178 bus->name);
179 return -1;
180 }
181
182 /* add it to the list */
183 list_add_tail(&bus->link, &mii_devs);
184
185 if (!current_mii)
186 current_mii = bus;
187
188 return 0;
189}
190
191void mdio_list_devices(void)
192{
193 struct list_head *entry;
194
195 list_for_each(entry, &mii_devs) {
196 int i;
197 struct mii_dev *bus = list_entry(entry, struct mii_dev, link);
198
199 printf("%s:\n", bus->name);
200
201 for (i = 0; i < PHY_MAX_ADDR; i++) {
202 struct phy_device *phydev = bus->phymap[i];
203
204 if (phydev) {
205 printf("%d - %s", i, phydev->drv->name);
206
207 if (phydev->dev)
208 printf(" <--> %s\n", phydev->dev->name);
209 else
210 printf("\n");
211 }
212 }
213 }
214}
215
Mike Frysinger5700bb62010-07-27 18:35:08 -0400216int miiphy_set_current_dev(const char *devname)
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200217{
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200218 struct mii_dev *dev;
219
Andy Fleming5f184712011-04-08 02:10:27 -0500220 dev = miiphy_get_dev_by_name(devname);
Mike Frysinger0daac972010-07-27 18:35:09 -0400221 if (dev) {
222 current_mii = dev;
223 return 0;
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200224 }
225
Andy Fleming5f184712011-04-08 02:10:27 -0500226 printf("No such device: %s\n", devname);
227
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200228 return 1;
229}
230
Andy Fleming5f184712011-04-08 02:10:27 -0500231struct mii_dev *mdio_get_current_dev(void)
232{
233 return current_mii;
234}
235
236struct phy_device *mdio_phydev_for_ethname(const char *ethname)
237{
238 struct list_head *entry;
239 struct mii_dev *bus;
240
241 list_for_each(entry, &mii_devs) {
242 int i;
243 bus = list_entry(entry, struct mii_dev, link);
244
245 for (i = 0; i < PHY_MAX_ADDR; i++) {
246 if (!bus->phymap[i] || !bus->phymap[i]->dev)
247 continue;
248
249 if (strcmp(bus->phymap[i]->dev->name, ethname) == 0)
250 return bus->phymap[i];
251 }
252 }
253
254 printf("%s is not a known ethernet\n", ethname);
255 return NULL;
256}
257
Mike Frysinger5700bb62010-07-27 18:35:08 -0400258const char *miiphy_get_current_dev(void)
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200259{
260 if (current_mii)
261 return current_mii->name;
262
263 return NULL;
264}
265
Mike Frysingerede16ea2010-07-27 18:35:10 -0400266static struct mii_dev *miiphy_get_active_dev(const char *devname)
267{
268 /* If the current mii is the one we want, return it */
269 if (current_mii)
270 if (strcmp(current_mii->name, devname) == 0)
271 return current_mii;
272
273 /* Otherwise, set the active one to the one we want */
274 if (miiphy_set_current_dev(devname))
275 return NULL;
276 else
277 return current_mii;
278}
279
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200280/*****************************************************************************
281 *
282 * Read to variable <value> from the PHY attached to device <devname>,
283 * use PHY address <addr> and register <reg>.
284 *
Andy Fleming1cdabc42011-10-31 09:46:13 -0500285 * This API is deprecated. Use phy_read on a phy_device found via phy_connect
286 *
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200287 * Returns:
288 * 0 on success
289 */
Chandan Nath5c45a222011-09-21 01:10:32 +0000290int miiphy_read(const char *devname, unsigned char addr, unsigned short reg,
Larry Johnson298035d2007-10-31 11:21:29 -0500291 unsigned short *value)
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200292{
Andy Fleming5f184712011-04-08 02:10:27 -0500293 struct mii_dev *bus;
Anatolij Gustschind67d5d52011-04-30 02:17:44 +0000294 int ret;
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200295
Andy Fleming5f184712011-04-08 02:10:27 -0500296 bus = miiphy_get_active_dev(devname);
Anatolij Gustschind67d5d52011-04-30 02:17:44 +0000297 if (!bus)
Andy Fleming5f184712011-04-08 02:10:27 -0500298 return 1;
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200299
Anatolij Gustschind67d5d52011-04-30 02:17:44 +0000300 ret = bus->read(bus, addr, MDIO_DEVAD_NONE, reg);
301 if (ret < 0)
302 return 1;
303
304 *value = (unsigned short)ret;
305 return 0;
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200306}
307
308/*****************************************************************************
309 *
310 * Write <value> to the PHY attached to device <devname>,
311 * use PHY address <addr> and register <reg>.
312 *
Andy Fleming1cdabc42011-10-31 09:46:13 -0500313 * This API is deprecated. Use phy_write on a phy_device found by phy_connect
314 *
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200315 * Returns:
316 * 0 on success
317 */
Chandan Nath5c45a222011-09-21 01:10:32 +0000318int miiphy_write(const char *devname, unsigned char addr, unsigned short reg,
Larry Johnson298035d2007-10-31 11:21:29 -0500319 unsigned short value)
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200320{
Andy Fleming5f184712011-04-08 02:10:27 -0500321 struct mii_dev *bus;
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200322
Andy Fleming5f184712011-04-08 02:10:27 -0500323 bus = miiphy_get_active_dev(devname);
324 if (bus)
325 return bus->write(bus, addr, MDIO_DEVAD_NONE, reg, value);
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200326
Mike Frysinger0daac972010-07-27 18:35:09 -0400327 return 1;
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200328}
329
330/*****************************************************************************
331 *
332 * Print out list of registered MII capable devices.
333 */
Andy Fleming16a53232011-04-07 14:38:35 -0500334void miiphy_listdev(void)
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200335{
336 struct list_head *entry;
337 struct mii_dev *dev;
338
Andy Fleming16a53232011-04-07 14:38:35 -0500339 puts("MII devices: ");
340 list_for_each(entry, &mii_devs) {
341 dev = list_entry(entry, struct mii_dev, link);
342 printf("'%s' ", dev->name);
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200343 }
Andy Fleming16a53232011-04-07 14:38:35 -0500344 puts("\n");
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200345
346 if (current_mii)
Andy Fleming16a53232011-04-07 14:38:35 -0500347 printf("Current device: '%s'\n", current_mii->name);
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200348}
349
wdenkc6097192002-11-03 00:24:07 +0000350/*****************************************************************************
351 *
352 * Read the OUI, manufacture's model number, and revision number.
353 *
354 * OUI: 22 bits (unsigned int)
355 * Model: 6 bits (unsigned char)
356 * Revision: 4 bits (unsigned char)
357 *
Andy Fleming1cdabc42011-10-31 09:46:13 -0500358 * This API is deprecated.
359 *
wdenkc6097192002-11-03 00:24:07 +0000360 * Returns:
361 * 0 on success
362 */
Mike Frysinger5700bb62010-07-27 18:35:08 -0400363int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui,
wdenkc6097192002-11-03 00:24:07 +0000364 unsigned char *model, unsigned char *rev)
365{
366 unsigned int reg = 0;
wdenk8bf3b002003-12-06 23:20:41 +0000367 unsigned short tmp;
wdenkc6097192002-11-03 00:24:07 +0000368
Andy Fleming16a53232011-04-07 14:38:35 -0500369 if (miiphy_read(devname, addr, MII_PHYSID2, &tmp) != 0) {
370 debug("PHY ID register 2 read failed\n");
371 return -1;
wdenkc6097192002-11-03 00:24:07 +0000372 }
wdenk8bf3b002003-12-06 23:20:41 +0000373 reg = tmp;
wdenkc6097192002-11-03 00:24:07 +0000374
Andy Fleming16a53232011-04-07 14:38:35 -0500375 debug("MII_PHYSID2 @ 0x%x = 0x%04x\n", addr, reg);
Shinya Kuribayashi26c7bab2008-01-19 10:25:59 +0900376
wdenkc6097192002-11-03 00:24:07 +0000377 if (reg == 0xFFFF) {
378 /* No physical device present at this address */
Andy Fleming16a53232011-04-07 14:38:35 -0500379 return -1;
wdenkc6097192002-11-03 00:24:07 +0000380 }
381
Andy Fleming16a53232011-04-07 14:38:35 -0500382 if (miiphy_read(devname, addr, MII_PHYSID1, &tmp) != 0) {
383 debug("PHY ID register 1 read failed\n");
384 return -1;
wdenkc6097192002-11-03 00:24:07 +0000385 }
wdenk8bf3b002003-12-06 23:20:41 +0000386 reg |= tmp << 16;
Andy Fleming16a53232011-04-07 14:38:35 -0500387 debug("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg);
Shinya Kuribayashi26c7bab2008-01-19 10:25:59 +0900388
Larry Johnson298035d2007-10-31 11:21:29 -0500389 *oui = (reg >> 10);
390 *model = (unsigned char)((reg >> 4) & 0x0000003F);
391 *rev = (unsigned char)(reg & 0x0000000F);
Andy Fleming16a53232011-04-07 14:38:35 -0500392 return 0;
wdenkc6097192002-11-03 00:24:07 +0000393}
394
Andy Fleming5f184712011-04-08 02:10:27 -0500395#ifndef CONFIG_PHYLIB
wdenkc6097192002-11-03 00:24:07 +0000396/*****************************************************************************
397 *
398 * Reset the PHY.
Andy Fleming1cdabc42011-10-31 09:46:13 -0500399 *
400 * This API is deprecated. Use PHYLIB.
401 *
wdenkc6097192002-11-03 00:24:07 +0000402 * Returns:
403 * 0 on success
404 */
Mike Frysinger5700bb62010-07-27 18:35:08 -0400405int miiphy_reset(const char *devname, unsigned char addr)
wdenkc6097192002-11-03 00:24:07 +0000406{
407 unsigned short reg;
Stefan Roeseab5a0dc2010-02-02 13:43:48 +0100408 int timeout = 500;
wdenkc6097192002-11-03 00:24:07 +0000409
Andy Fleming16a53232011-04-07 14:38:35 -0500410 if (miiphy_read(devname, addr, MII_BMCR, &reg) != 0) {
411 debug("PHY status read failed\n");
412 return -1;
Wolfgang Denkf89920c2005-08-12 23:15:53 +0200413 }
Andy Fleming16a53232011-04-07 14:38:35 -0500414 if (miiphy_write(devname, addr, MII_BMCR, reg | BMCR_RESET) != 0) {
415 debug("PHY reset failed\n");
416 return -1;
wdenkc6097192002-11-03 00:24:07 +0000417 }
wdenk5653fc32004-02-08 22:55:38 +0000418#ifdef CONFIG_PHY_RESET_DELAY
Andy Fleming16a53232011-04-07 14:38:35 -0500419 udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */
wdenk5653fc32004-02-08 22:55:38 +0000420#endif
wdenkc6097192002-11-03 00:24:07 +0000421 /*
422 * Poll the control register for the reset bit to go to 0 (it is
423 * auto-clearing). This should happen within 0.5 seconds per the
424 * IEEE spec.
425 */
wdenkc6097192002-11-03 00:24:07 +0000426 reg = 0x8000;
Stefan Roeseab5a0dc2010-02-02 13:43:48 +0100427 while (((reg & 0x8000) != 0) && timeout--) {
Mike Frysinger8ef583a2010-12-23 15:40:12 -0500428 if (miiphy_read(devname, addr, MII_BMCR, &reg) != 0) {
Stefan Roeseab5a0dc2010-02-02 13:43:48 +0100429 debug("PHY status read failed\n");
430 return -1;
wdenkc6097192002-11-03 00:24:07 +0000431 }
Stefan Roeseab5a0dc2010-02-02 13:43:48 +0100432 udelay(1000);
wdenkc6097192002-11-03 00:24:07 +0000433 }
434 if ((reg & 0x8000) == 0) {
Andy Fleming16a53232011-04-07 14:38:35 -0500435 return 0;
wdenkc6097192002-11-03 00:24:07 +0000436 } else {
Andy Fleming16a53232011-04-07 14:38:35 -0500437 puts("PHY reset timed out\n");
438 return -1;
wdenkc6097192002-11-03 00:24:07 +0000439 }
Andy Fleming16a53232011-04-07 14:38:35 -0500440 return 0;
wdenkc6097192002-11-03 00:24:07 +0000441}
Andy Fleming5f184712011-04-08 02:10:27 -0500442#endif /* !PHYLIB */
wdenkc6097192002-11-03 00:24:07 +0000443
wdenkc6097192002-11-03 00:24:07 +0000444/*****************************************************************************
445 *
Larry Johnson71bc6e62007-11-01 08:46:50 -0500446 * Determine the ethernet speed (10/100/1000). Return 10 on error.
wdenkc6097192002-11-03 00:24:07 +0000447 */
Mike Frysinger5700bb62010-07-27 18:35:08 -0400448int miiphy_speed(const char *devname, unsigned char addr)
wdenkc6097192002-11-03 00:24:07 +0000449{
Larry Johnson71bc6e62007-11-01 08:46:50 -0500450 u16 bmcr, anlpar;
wdenkc6097192002-11-03 00:24:07 +0000451
wdenk6fb6af62004-03-23 23:20:24 +0000452#if defined(CONFIG_PHY_GIGE)
Larry Johnson71bc6e62007-11-01 08:46:50 -0500453 u16 btsr;
454
455 /*
456 * Check for 1000BASE-X. If it is supported, then assume that the speed
457 * is 1000.
458 */
Andy Fleming16a53232011-04-07 14:38:35 -0500459 if (miiphy_is_1000base_x(devname, addr))
Larry Johnson71bc6e62007-11-01 08:46:50 -0500460 return _1000BASET;
Andy Fleming16a53232011-04-07 14:38:35 -0500461
Larry Johnson71bc6e62007-11-01 08:46:50 -0500462 /*
463 * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
464 */
465 /* Check for 1000BASE-T. */
Andy Fleming16a53232011-04-07 14:38:35 -0500466 if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) {
467 printf("PHY 1000BT status");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500468 goto miiphy_read_failed;
469 }
470 if (btsr != 0xFFFF &&
Andy Fleming16a53232011-04-07 14:38:35 -0500471 (btsr & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)))
Larry Johnson71bc6e62007-11-01 08:46:50 -0500472 return _1000BASET;
wdenk6fb6af62004-03-23 23:20:24 +0000473#endif /* CONFIG_PHY_GIGE */
wdenk855a4962004-03-14 18:23:55 +0000474
wdenka56bd922004-06-06 23:13:55 +0000475 /* Check Basic Management Control Register first. */
Andy Fleming16a53232011-04-07 14:38:35 -0500476 if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) {
477 printf("PHY speed");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500478 goto miiphy_read_failed;
wdenkc6097192002-11-03 00:24:07 +0000479 }
wdenka56bd922004-06-06 23:13:55 +0000480 /* Check if auto-negotiation is on. */
Mike Frysinger8ef583a2010-12-23 15:40:12 -0500481 if (bmcr & BMCR_ANENABLE) {
wdenka56bd922004-06-06 23:13:55 +0000482 /* Get auto-negotiation results. */
Andy Fleming16a53232011-04-07 14:38:35 -0500483 if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
484 printf("PHY AN speed");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500485 goto miiphy_read_failed;
wdenka56bd922004-06-06 23:13:55 +0000486 }
Mike Frysinger8ef583a2010-12-23 15:40:12 -0500487 return (anlpar & LPA_100) ? _100BASET : _10BASET;
wdenka56bd922004-06-06 23:13:55 +0000488 }
489 /* Get speed from basic control settings. */
Mike Frysinger8ef583a2010-12-23 15:40:12 -0500490 return (bmcr & BMCR_SPEED100) ? _100BASET : _10BASET;
wdenka56bd922004-06-06 23:13:55 +0000491
Michael Zaidman5f841952010-02-28 16:28:25 +0200492miiphy_read_failed:
Andy Fleming16a53232011-04-07 14:38:35 -0500493 printf(" read failed, assuming 10BASE-T\n");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500494 return _10BASET;
wdenkc6097192002-11-03 00:24:07 +0000495}
496
wdenkc6097192002-11-03 00:24:07 +0000497/*****************************************************************************
498 *
Larry Johnson71bc6e62007-11-01 08:46:50 -0500499 * Determine full/half duplex. Return half on error.
wdenkc6097192002-11-03 00:24:07 +0000500 */
Mike Frysinger5700bb62010-07-27 18:35:08 -0400501int miiphy_duplex(const char *devname, unsigned char addr)
wdenkc6097192002-11-03 00:24:07 +0000502{
Larry Johnson71bc6e62007-11-01 08:46:50 -0500503 u16 bmcr, anlpar;
wdenkc6097192002-11-03 00:24:07 +0000504
wdenk6fb6af62004-03-23 23:20:24 +0000505#if defined(CONFIG_PHY_GIGE)
Larry Johnson71bc6e62007-11-01 08:46:50 -0500506 u16 btsr;
507
508 /* Check for 1000BASE-X. */
Andy Fleming16a53232011-04-07 14:38:35 -0500509 if (miiphy_is_1000base_x(devname, addr)) {
Larry Johnson71bc6e62007-11-01 08:46:50 -0500510 /* 1000BASE-X */
Andy Fleming16a53232011-04-07 14:38:35 -0500511 if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
512 printf("1000BASE-X PHY AN duplex");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500513 goto miiphy_read_failed;
514 }
515 }
516 /*
517 * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
518 */
519 /* Check for 1000BASE-T. */
Andy Fleming16a53232011-04-07 14:38:35 -0500520 if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) {
521 printf("PHY 1000BT status");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500522 goto miiphy_read_failed;
523 }
524 if (btsr != 0xFFFF) {
525 if (btsr & PHY_1000BTSR_1000FD) {
526 return FULL;
527 } else if (btsr & PHY_1000BTSR_1000HD) {
528 return HALF;
wdenk855a4962004-03-14 18:23:55 +0000529 }
530 }
wdenk6fb6af62004-03-23 23:20:24 +0000531#endif /* CONFIG_PHY_GIGE */
wdenk855a4962004-03-14 18:23:55 +0000532
wdenka56bd922004-06-06 23:13:55 +0000533 /* Check Basic Management Control Register first. */
Andy Fleming16a53232011-04-07 14:38:35 -0500534 if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) {
535 puts("PHY duplex");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500536 goto miiphy_read_failed;
wdenkc6097192002-11-03 00:24:07 +0000537 }
wdenka56bd922004-06-06 23:13:55 +0000538 /* Check if auto-negotiation is on. */
Mike Frysinger8ef583a2010-12-23 15:40:12 -0500539 if (bmcr & BMCR_ANENABLE) {
wdenka56bd922004-06-06 23:13:55 +0000540 /* Get auto-negotiation results. */
Andy Fleming16a53232011-04-07 14:38:35 -0500541 if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
542 puts("PHY AN duplex");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500543 goto miiphy_read_failed;
wdenka56bd922004-06-06 23:13:55 +0000544 }
Mike Frysinger8ef583a2010-12-23 15:40:12 -0500545 return (anlpar & (LPA_10FULL | LPA_100FULL)) ?
Larry Johnson71bc6e62007-11-01 08:46:50 -0500546 FULL : HALF;
wdenka56bd922004-06-06 23:13:55 +0000547 }
548 /* Get speed from basic control settings. */
Mike Frysinger8ef583a2010-12-23 15:40:12 -0500549 return (bmcr & BMCR_FULLDPLX) ? FULL : HALF;
wdenka56bd922004-06-06 23:13:55 +0000550
Michael Zaidman5f841952010-02-28 16:28:25 +0200551miiphy_read_failed:
Andy Fleming16a53232011-04-07 14:38:35 -0500552 printf(" read failed, assuming half duplex\n");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500553 return HALF;
554}
555
556/*****************************************************************************
557 *
558 * Return 1 if PHY supports 1000BASE-X, 0 if PHY supports 10BASE-T/100BASE-TX/
559 * 1000BASE-T, or on error.
560 */
Mike Frysinger5700bb62010-07-27 18:35:08 -0400561int miiphy_is_1000base_x(const char *devname, unsigned char addr)
Larry Johnson71bc6e62007-11-01 08:46:50 -0500562{
563#if defined(CONFIG_PHY_GIGE)
564 u16 exsr;
565
Andy Fleming16a53232011-04-07 14:38:35 -0500566 if (miiphy_read(devname, addr, MII_ESTATUS, &exsr)) {
567 printf("PHY extended status read failed, assuming no "
Larry Johnson71bc6e62007-11-01 08:46:50 -0500568 "1000BASE-X\n");
569 return 0;
570 }
Mike Frysinger8ef583a2010-12-23 15:40:12 -0500571 return 0 != (exsr & (ESTATUS_1000XF | ESTATUS_1000XH));
Larry Johnson71bc6e62007-11-01 08:46:50 -0500572#else
573 return 0;
574#endif
wdenkc6097192002-11-03 00:24:07 +0000575}
576
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200577#ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
wdenkfc3e2162003-10-08 22:33:00 +0000578/*****************************************************************************
579 *
580 * Determine link status
581 */
Mike Frysinger5700bb62010-07-27 18:35:08 -0400582int miiphy_link(const char *devname, unsigned char addr)
wdenkfc3e2162003-10-08 22:33:00 +0000583{
584 unsigned short reg;
585
wdenka3d991b2004-04-15 21:48:45 +0000586 /* dummy read; needed to latch some phys */
Andy Fleming16a53232011-04-07 14:38:35 -0500587 (void)miiphy_read(devname, addr, MII_BMSR, &reg);
588 if (miiphy_read(devname, addr, MII_BMSR, &reg)) {
589 puts("MII_BMSR read failed, assuming no link\n");
590 return 0;
wdenkfc3e2162003-10-08 22:33:00 +0000591 }
592
593 /* Determine if a link is active */
Mike Frysinger8ef583a2010-12-23 15:40:12 -0500594 if ((reg & BMSR_LSTATUS) != 0) {
Andy Fleming16a53232011-04-07 14:38:35 -0500595 return 1;
wdenkfc3e2162003-10-08 22:33:00 +0000596 } else {
Andy Fleming16a53232011-04-07 14:38:35 -0500597 return 0;
wdenkfc3e2162003-10-08 22:33:00 +0000598 }
599}
600#endif