blob: c8725106795842866113b2d150d6535b1b26a9b4 [file] [log] [blame]
Fabio Estevam47c3e072011-06-07 07:02:53 +00001/*
2 * Copyright (C) 2011 Freescale Semiconductor, Inc.
3 *
4 * Configuration settings for the MX53ARD Freescale board.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
19 * MA 02111-1307 USA
20 */
21
22#ifndef __CONFIG_H
23#define __CONFIG_H
24
25#define CONFIG_MX53
26
27#define CONFIG_SYS_MX5_HCLK 24000000
28#define CONFIG_SYS_MX5_CLK32 32768
29#define CONFIG_DISPLAY_CPUINFO
30#define CONFIG_DISPLAY_BOARDINFO
31
32#define CONFIG_L2_OFF
33
34#include <asm/arch/imx-regs.h>
35
36#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
37#define CONFIG_REVISION_TAG
38#define CONFIG_SETUP_MEMORY_TAGS
39#define CONFIG_INITRD_TAG
40
41/* Size of malloc() pool */
42#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
43
44#define CONFIG_BOARD_EARLY_INIT_F
45#define CONFIG_MXC_GPIO
46
47#define CONFIG_MXC_UART
48#define CONFIG_SYS_MX53_UART1
49
50/* I2C Configs */
51#define CONFIG_CMD_I2C
52#define CONFIG_HARD_I2C
53#define CONFIG_I2C_MXC
54#define CONFIG_SYS_I2C_MX53_PORT2
55#define CONFIG_SYS_I2C_SPEED 100000
56#define CONFIG_SYS_I2C_SLAVE 0xfe
57
58/* MMC Configs */
59#define CONFIG_FSL_ESDHC
60#define CONFIG_SYS_FSL_ESDHC_ADDR 0
61#define CONFIG_SYS_FSL_ESDHC_NUM 2
62
63#define CONFIG_MMC
64#define CONFIG_CMD_MMC
65#define CONFIG_GENERIC_MMC
66#define CONFIG_CMD_FAT
67#define CONFIG_DOS_PARTITION
68
69/* Eth Configs */
70#define CONFIG_HAS_ETH1
71#define CONFIG_NET_MULTI
72#define CONFIG_MII
73#define CONFIG_MII_GASKET
74#define CONFIG_DISCOVER_PHY
75
76#define CONFIG_CMD_PING
77#define CONFIG_CMD_DHCP
78#define CONFIG_CMD_MII
79#define CONFIG_CMD_NET
80
81/* allow to overwrite serial and ethaddr */
82#define CONFIG_ENV_OVERWRITE
83#define CONFIG_CONS_INDEX 1
84#define CONFIG_BAUDRATE 115200
85#define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
86
87/* Command definition */
88#include <config_cmd_default.h>
89
90#undef CONFIG_CMD_IMLS
91
92#define CONFIG_BOOTDELAY 3
93
94#define CONFIG_PRIME "smc911x"
95
96/*Support LAN9217*/
97#define CONFIG_SMC911X
98#define CONFIG_SMC911X_16_BIT
99#define CONFIG_SMC911X_BASE CS1_BASE_ADDR
100
101#define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */
102#define CONFIG_SYS_TEXT_BASE 0x77800000
103
104#define CONFIG_EXTRA_ENV_SETTINGS \
105 "script=boot.scr\0" \
106 "uimage=uImage\0" \
107 "mmcdev=0\0" \
108 "mmcpart=2\0" \
109 "mmcroot=/dev/mmcblk0p3 rw\0" \
110 "mmcrootfstype=ext3 rootwait\0" \
111 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \
112 "root=${mmcroot} " \
113 "rootfstype=${mmcrootfstype}\0" \
114 "loadbootscript=" \
115 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
116 "bootscript=echo Running bootscript from mmc ...; " \
117 "source\0" \
118 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
119 "mmcboot=echo Booting from mmc ...; " \
120 "run mmcargs; " \
121 "bootm\0" \
122 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \
123 "root=/dev/nfs " \
124 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
125 "netboot=echo Booting from net ...; " \
126 "run netargs; " \
127 "dhcp ${uimage}; bootm\0" \
128
129#define CONFIG_BOOTCOMMAND \
130 "if mmc rescan ${mmcdev}; then " \
131 "if run loadbootscript; then " \
132 "run bootscript; " \
133 "else " \
134 "if run loaduimage; then " \
135 "run mmcboot; " \
136 "else run netboot; " \
137 "fi; " \
138 "fi; " \
139 "else run netboot; fi"
140#define CONFIG_ARP_TIMEOUT 200UL
141
142/* Miscellaneous configurable options */
143#define CONFIG_SYS_LONGHELP /* undef to save memory */
144#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
145#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
146#define CONFIG_SYS_PROMPT "MX53ARD U-Boot > "
147#define CONFIG_AUTO_COMPLETE
148#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
149
150/* Print Buffer Size */
151#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
152#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
153#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
154
155#define CONFIG_SYS_MEMTEST_START 0x70000000
156#define CONFIG_SYS_MEMTEST_END 0x70010000
157
158#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
159
160#define CONFIG_SYS_HZ 1000
161#define CONFIG_CMDLINE_EDITING
162
163/* Stack sizes */
164#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
165
166/* Physical Memory Map */
167#define CONFIG_NR_DRAM_BANKS 2
168#define PHYS_SDRAM_1 CSD0_BASE_ADDR
169#define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
170#define PHYS_SDRAM_2 CSD1_BASE_ADDR
171#define PHYS_SDRAM_2_SIZE (512 * 1024 * 1024)
172#define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE)
173
174#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
175#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
176#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
177
178#define CONFIG_SYS_INIT_SP_OFFSET \
179 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
180#define CONFIG_SYS_INIT_SP_ADDR \
181 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
182
183/* FLASH and environment organization */
184#define CONFIG_SYS_NO_FLASH
185
186#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
187#define CONFIG_ENV_SIZE (8 * 1024)
188#define CONFIG_ENV_IS_IN_MMC
189#define CONFIG_SYS_MMC_ENV_DEV 0
190
191#define CONFIG_OF_LIBFDT
192
193#define MX53ARD_CS1GCR1 (CSEN | DSZ(2))
194#define MX53ARD_CS1RCR1 (RCSN(2) | OEN (1) | RWSC(22))
195#define MX53ARD_CS1RCR2 RBEN(2)
196#define MX53ARD_CS1WCR1 (WCSN(2) | WEN(2) | WBEN(2) | WWSC(22))
197
198#endif /* __CONFIG_H */