blob: 0e7e0ce3477e32297be6b67dd558fcfddf3b6af7 [file] [log] [blame]
Magnus Lilja8449f282009-07-01 01:07:55 +02001/*
2 *
3 * (C) Copyright 2009 Magnus Lilja <lilja.magnus@gmail.com>
4 *
5 * (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26
27#include <common.h>
Ben Warren736fead2009-07-20 22:01:11 -070028#include <netdev.h>
Stefano Babic86271112011-03-14 15:43:56 +010029#include <asm/arch/clock.h>
30#include <asm/arch/imx-regs.h>
Helmut Raiger47c54552011-09-29 05:45:03 +000031#include <asm/arch/sys_proto.h>
Fabio Estevamb73850f2011-04-10 08:17:50 +000032#include <watchdog.h>
Magnus Lilja8449f282009-07-01 01:07:55 +020033
34DECLARE_GLOBAL_DATA_PTR;
35
Fabio Estevamb73850f2011-04-10 08:17:50 +000036#ifdef CONFIG_HW_WATCHDOG
37void hw_watchdog_reset(void)
38{
39 mxc_hw_watchdog_reset();
40}
41#endif
42
Magnus Lilja8449f282009-07-01 01:07:55 +020043int dram_init(void)
44{
Fabio Estevamed3df722011-02-09 01:17:55 +000045 /* dram_init must store complete ramsize in gd->ram_size */
Albert ARIBAUDa55d23c2011-07-03 05:55:33 +000046 gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
Fabio Estevamed3df722011-02-09 01:17:55 +000047 PHYS_SDRAM_1_SIZE);
48 return 0;
49}
50
Fabio Estevam9b6442f2011-02-09 01:17:56 +000051int board_early_init_f(void)
Magnus Lilja8449f282009-07-01 01:07:55 +020052{
53 /* CS5: CPLD incl. network controller */
Helmut Raiger47c54552011-09-29 05:45:03 +000054 static const struct mxc_weimcs cs5 = {
55 /* sp wp bcd bcs psz pme sync dol cnc wsc ew wws edc */
56 CSCR_U(0, 0, 0, 0, 0, 0, 0, 0, 3, 24, 0, 4, 3),
57 /* oea oen ebwa ebwn csa ebc dsz csn psr cre wrap csen */
58 CSCR_L(2, 2, 2, 5, 2, 0, 5, 2, 0, 0, 0, 1),
59 /* ebra ebrn rwa rwn mum lah lbn lba dww dct wwu age cnc2 fce*/
60 CSCR_A(2, 2, 2, 2, 0, 0, 2, 2, 0, 0, 0, 0, 0, 0)
61 };
62
63 mxc_setup_weimcs(5, &cs5);
Magnus Lilja8449f282009-07-01 01:07:55 +020064
65 /* Setup UART1 and SPI2 pins */
66 mx31_uart1_hw_init();
67 mx31_spi2_hw_init();
68
Fabio Estevam9b6442f2011-02-09 01:17:56 +000069 return 0;
70}
71
72int board_init(void)
73{
Magnus Lilja8449f282009-07-01 01:07:55 +020074 /* adress of boot parameters */
75 gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
76
77 return 0;
78}
79
Fabio Estevamb73850f2011-04-10 08:17:50 +000080int board_late_init(void)
81{
82#ifdef CONFIG_HW_WATCHDOG
83 mxc_hw_watchdog_enable();
84#endif
85 return 0;
86}
87
Magnus Lilja8449f282009-07-01 01:07:55 +020088int checkboard(void)
89{
Fabio Estevame9e07902011-04-18 07:38:12 +000090 printf("Board: MX31PDK\n");
Magnus Lilja8449f282009-07-01 01:07:55 +020091 return 0;
92}
Ben Warren736fead2009-07-20 22:01:11 -070093
94int board_eth_init(bd_t *bis)
95{
96 int rc = 0;
97#ifdef CONFIG_SMC911X
98 rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
99#endif
100 return rc;
101}