blob: e93398fe7c1c3c231857ce62f4580ca580a414ef [file] [log] [blame]
Sam Protsenko3457bba2016-04-13 14:20:25 +03001config USB_DWC3
2 bool "DesignWare USB3 DRD Core Support"
3 depends on (USB && USB_GADGET)
4 select USB_GADGET_DUALSPEED
5 help
6 Say Y here if your system has a Dual Role SuperSpeed
7 USB controller based on the DesignWare USB3 IP Core.
Sam Protsenko65403f32016-04-13 14:20:27 +03008
9if USB_DWC3
10
11choice
12 bool "DWC3 Mode Selection"
13
14config USB_DWC3_HOST
15 bool "Host only mode"
16 depends on USB
17 help
18 Select this when you want to use DWC3 in host mode only,
19 thereby the gadget feature will be regressed.
20
21config USB_DWC3_GADGET
22 bool "Gadget only mode"
23 depends on USB_GADGET
24 help
25 Select this when you want to use DWC3 in gadget mode only,
26 thereby the host feature will be regressed.
27
28endchoice
29
Sam Protsenkoc16bf622016-04-13 14:20:28 +030030comment "Platform Glue Driver Support"
31
32config USB_DWC3_OMAP
33 bool "Texas Instruments OMAP5 and similar Platforms"
34 help
35 Some platforms from Texas Instruments like OMAP5, DRA7xxx and
36 AM437x use this IP for USB2/3 functionality.
37
38 Say 'Y' here if you have one such device
39
Sam Protsenkob1427292016-04-13 14:20:29 +030040menu "PHY Subsystem"
41
42config USB_DWC3_PHY_OMAP
43 bool "TI OMAP SoC series USB DRD PHY driver"
44 help
45 Enable single driver for both USB2 PHY programming and USB3 PHY
46 programming for TI SoCs.
47
48config USB_DWC3_PHY_SAMSUNG
49 bool "Exynos5 SoC series USB DRD PHY driver"
50 help
51 Enable USB DRD PHY support for Exynos 5 SoC series.
52 This driver provides PHY interface for USB 3.0 DRD controller
53 present on Exynos5 SoC series.
54
55endmenu
56
Sam Protsenko65403f32016-04-13 14:20:27 +030057endif