blob: 560b3f81129c371da92c6b9b1c3fd341e72297ed [file] [log] [blame]
Masahiro Yamada48264d92016-02-02 21:11:32 +09001/*
2 * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#ifndef __CLK_UNIPHIER_H__
8#define __CLK_UNIPHIER_H__
9
10#include <linux/kernel.h>
11
12struct uniphier_clk_gate_data {
13 int index;
14 unsigned int reg;
15 u32 mask;
16 u32 data;
17};
18
19struct uniphier_clk_rate_data {
20 int index;
21 unsigned int reg;
22#define UNIPHIER_CLK_RATE_IS_FIXED UINT_MAX
23 u32 mask;
24 u32 data;
25 unsigned long rate;
26};
27
28struct uniphier_clk_soc_data {
29 struct uniphier_clk_gate_data *gate;
30 unsigned int nr_gate;
31 struct uniphier_clk_rate_data *rate;
32 unsigned int nr_rate;
33};
34
35#define UNIPHIER_CLK_FIXED_RATE(i, f) \
36 { \
37 .index = i, \
38 .reg = UNIPHIER_CLK_RATE_IS_FIXED, \
39 .rate = f, \
40 }
41
42/**
43 * struct uniphier_clk_priv - private data for UniPhier clock driver
44 *
45 * @base: base address of the clock provider
46 * @socdata: SoC specific data
47 */
48struct uniphier_clk_priv {
49 void __iomem *base;
50 struct uniphier_clk_soc_data *socdata;
51};
52
53extern const struct clk_ops uniphier_clk_ops;
54int uniphier_clk_probe(struct udevice *dev);
55int uniphier_clk_remove(struct udevice *dev);
56
57#endif /* __CLK_UNIPHIER_H__ */