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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / 483a0cf804dfc2b320fc32c7de77d23502dadfd5 / . / cpu / mcf52x2 / start.S
blob: 8ae9591b8ac36d4f995552e5ecca5279a6d9cd41 [file] [log] [blame]
wdenkbf9e3b32004-02-12 00:47:09 +0000[diff] [blame]1/*
2 * Copyright (C) 2003 Josef Baumgartner <josef.baumgartner@telex.de>
3 * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <config.h>
25#include "version.h"
26
27#ifndef CONFIG_IDENT_STRING
28#define CONFIG_IDENT_STRING ""
29#endif
30
31
32#define _START _start
33#define _FAULT _fault
34
35
36#define SAVE_ALL \
37 move.w #0x2700,%sr; /* disable intrs */ \
38 subl #60,%sp; /* space for 15 regs */ \
39 moveml %d0-%d7/%a0-%a6,%sp@; \
40
41#define RESTORE_ALL \
42 moveml %sp@,%d0-%d7/%a0-%a6; \
43 addl #60,%sp; /* space for 15 regs */ \
44 rte
45
46/* If we come from a pre-loader we don't need an initial exception
47 * table.
48 */
49#if !defined(CONFIG_MONITOR_IS_IN_RAM)
50
51.text
52/*
53 * Vector table. This is used for initial platform startup.
54 * These vectors are to catch any un-intended traps.
55 */
56_vectors:
57
Zachary P. Landaueacbd312006-01-26 17:35:56 -0500[diff] [blame]58#ifndef CONFIG_M5271
wdenkbf9e3b32004-02-12 00:47:09 +0000[diff] [blame]59.long 0x00000000, _START
Zachary P. Landaueacbd312006-01-26 17:35:56 -0500[diff] [blame]60#else
61.long 0x00000000, 0x400 /* Flash offset is 0 until we setup CS0 */
62#endif
wdenkbf9e3b32004-02-12 00:47:09 +0000[diff] [blame]63.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
64.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
65.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
66.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
67.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
68.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
69.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
70.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
71
72.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
73.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
74.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
75.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
76.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
77.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
78.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
79.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
80
81.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
82.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
83.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
84.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
85.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
86.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
87.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
88.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
89
90.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
91.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
92.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
93.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
94.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
95.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
96.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
97.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
98
99#endif
100
101 .text
102
103 .globl _start
104_start:
105 nop
106 nop
107 move.w #0x2700,%sr
108
109 /* if we come from a pre-loader we have no exception table and
110 * therefore no VBR to set
111 */
112#if !defined(CONFIG_MONITOR_IS_IN_RAM)
113 move.l #CFG_FLASH_BASE, %d0
114 movec %d0, %VBR
115#endif
116
stroese8c725b92004-12-16 18:09:49 +0000[diff] [blame]117#if defined(CONFIG_M5272) || defined(CONFIG_M5249)
wdenkbf9e3b32004-02-12 00:47:09 +0000[diff] [blame]118 move.l #(CFG_MBAR + 1), %d0 /* set MBAR address + valid flag */
119 move.c %d0, %MBAR
120
stroese8c725b92004-12-16 18:09:49 +0000[diff] [blame]121 /*** The 5249 has MBAR2 as well ***/
122#ifdef CFG_MBAR2
123 move.l #(CFG_MBAR2 + 1), %d0 /* Get MBAR2 address */
124 movec %d0, #0xc0e /* Set MBAR2 */
125#endif
126
wdenkbf9e3b32004-02-12 00:47:09 +0000[diff] [blame]127 move.l #(CFG_INIT_RAM_ADDR + 1), %d0
128 movec %d0, %RAMBAR0
stroese8c725b92004-12-16 18:09:49 +0000[diff] [blame]129#endif /* #if defined(CONFIG_M5272) || defined(CONFIG_M5249) */
wdenkbf9e3b32004-02-12 00:47:09 +0000[diff] [blame]130
Zachary P. Landaueacbd312006-01-26 17:35:56 -0500[diff] [blame]131#if defined(CONFIG_M5282) || defined(CONFIG_M5271)
wdenkbf9e3b32004-02-12 00:47:09 +0000[diff] [blame]132 /* Initialize IPSBAR */
133 move.l #(CFG_MBAR + 1), %d0 /* set IPSBAR address + valid flag */
134 move.l %d0, 0x40000000
135
Zachary P. Landaueacbd312006-01-26 17:35:56 -0500[diff] [blame]136#ifdef CONFIG_M5282
wdenkbf9e3b32004-02-12 00:47:09 +0000[diff] [blame]137 /* Initialize FLASHBAR: locate internal Flash and validate it */
138 move.l #(CFG_INT_FLASH_BASE + 0x21), %d0
139 movec %d0, %RAMBAR0
Zachary P. Landaueacbd312006-01-26 17:35:56 -0500[diff] [blame]140#endif
wdenkbf9e3b32004-02-12 00:47:09 +0000[diff] [blame]141
142 /* Initialize RAMBAR1: locate SRAM and validate it */
143 move.l #(CFG_INIT_RAM_ADDR + 0x21), %d0
144 movec %d0, %RAMBAR1
Zachary P. Landaueacbd312006-01-26 17:35:56 -0500[diff] [blame]145#ifdef CONFIG_M5271
146 move.l #(_flash_setup-CFG_FLASH_BASE), %a0
147 move.l #(_flash_setup_end-CFG_FLASH_BASE), %a1
148 move.l #(CFG_INIT_RAM_ADDR), %a2
149_copy_flash:
150 move.l (%a0)+, (%a2)+
151 cmp.l %a0, %a1
152 bgt.s _copy_flash
wdenkbf9e3b32004-02-12 00:47:09 +0000[diff] [blame]153#endif
154
Zachary P. Landaueacbd312006-01-26 17:35:56 -0500[diff] [blame]155 jmp CFG_INIT_RAM_ADDR
156_after_flash_copy:
157#endif
158
159#if 0
wdenkbf9e3b32004-02-12 00:47:09 +0000[diff] [blame]160 /* invalidate and disable cache */
161 move.l #0x01000000, %d0 /* Invalidate cache cmd */
162 movec %d0, %CACR /* Invalidate cache */
163 move.l #0, %d0
164 movec %d0, %ACR0
165 movec %d0, %ACR1
Zachary P. Landaueacbd312006-01-26 17:35:56 -0500[diff] [blame]166#endif
wdenkbf9e3b32004-02-12 00:47:09 +0000[diff] [blame]167
168 /* set stackpointer to end of internal ram to get some stackspace for the first c-code */
169 move.l #(CFG_INIT_RAM_ADDR + CFG_INIT_SP_OFFSET), %sp
170 clr.l %sp@-
171
172 move.l #__got_start, %a5 /* put relocation table address to a5 */
173
174 bsr cpu_init_f /* run low-level CPU init code (from flash) */
175 bsr board_init_f /* run low-level board init code (from flash) */
176
177 /* board_init_f() does not return
178
179/*------------------------------------------------------------------------------*/
180
Zachary P. Landaueacbd312006-01-26 17:35:56 -0500[diff] [blame]181#ifdef CONFIG_M5271
182_flash_setup:
183 move.l #0x1000, %d0
184 move.w %d0, 0x40000080
185 move.l #0x2180, %d0
186 move.w %d0, 0x4000008A
187 move.l #0x3f0001, %d0
188 move.l %d0, 0x40000084
189 jmp _after_flash_copy.L
190_flash_setup_end:
191#endif
192
wdenkbf9e3b32004-02-12 00:47:09 +0000[diff] [blame]193/*
194 * void relocate_code (addr_sp, gd, addr_moni)
195 *
196 * This "function" does not return, instead it continues in RAM
197 * after relocating the monitor code.
198 *
199 * r3 = dest
200 * r4 = src
201 * r5 = length in bytes
202 * r6 = cachelinesize
203 */
204 .globl relocate_code
205relocate_code:
206 link.w %a6,#0
207 move.l 8(%a6), %sp /* set new stack pointer */
208
209 move.l 12(%a6), %d0 /* Save copy of Global Data pointer */
210 move.l 16(%a6), %a0 /* Save copy of Destination Address */
211
212 move.l #CFG_MONITOR_BASE, %a1
213 move.l #__init_end, %a2
214 move.l %a0, %a3
215
216 /* copy the code to RAM */
2171:
218 move.l (%a1)+, (%a3)+
219 cmp.l %a1,%a2
220 bgt.s 1b
221
222/*
223 * We are done. Do not return, instead branch to second part of board
224 * initialization, now running from RAM.
225 */
226 move.l %a0, %a1
227 add.l #(in_ram - CFG_MONITOR_BASE), %a1
228 jmp (%a1)
229
230in_ram:
231
232clear_bss:
233 /*
234 * Now clear BSS segment
235 */
236 move.l %a0, %a1
237 add.l #(_sbss - CFG_MONITOR_BASE),%a1
238 move.l %a0, %d1
239 add.l #(_ebss - CFG_MONITOR_BASE),%d1
2406:
241 clr.l (%a1)+
242 cmp.l %a1,%d1
243 bgt.s 6b
244
245 /*
246 * fix got table in RAM
247 */
248 move.l %a0, %a1
249 add.l #(__got_start - CFG_MONITOR_BASE),%a1
250 move.l %a1,%a5 /* * fix got pointer register a5 */
251
252 move.l %a0, %a2
253 add.l #(__got_end - CFG_MONITOR_BASE),%a2
254
2557:
256 move.l (%a1),%d1
257 sub.l #_start,%d1
258 add.l %a0,%d1
259 move.l %d1,(%a1)+
260 cmp.l %a2, %a1
261 bne 7b
262
263 /* calculate relative jump to board_init_r in ram */
264 move.l %a0, %a1
265 add.l #(board_init_r - CFG_MONITOR_BASE), %a1
266
267 /* set parameters for board_init_r */
268 move.l %a0,-(%sp) /* dest_addr */
269 move.l %d0,-(%sp) /* gd */
270 jsr (%a1)
271
272/*------------------------------------------------------------------------------*/
273/* exception code */
274 .globl _fault
275_fault:
276 jmp _fault
277
278 .globl _exc_handler
279_exc_handler:
280 SAVE_ALL
281 movel %sp,%sp@-
282 bsr exc_handler
283 addql #4,%sp
284 RESTORE_ALL
285
286 .globl _int_handler
287_int_handler:
288 SAVE_ALL
289 movel %sp,%sp@-
290 bsr int_handler
291 addql #4,%sp
292 RESTORE_ALL
293
294/*------------------------------------------------------------------------------*/
295/* cache functions */
296#ifdef CONFIG_M5272
297 .globl icache_enable
298icache_enable:
299 move.l #0x01000000, %d0 /* Invalidate cache cmd */
300 movec %d0, %CACR /* Invalidate cache */
301 move.l #0x0000c000, %d0 /* Setup cache mask */
302 movec %d0, %ACR0 /* Enable cache */
303 move.l #0xff00c000, %d0 /* Setup cache mask */
304 movec %d0, %ACR1 /* Enable cache */
305 move.l #0x80000100, %d0 /* Setup cache mask */
306 movec %d0, %CACR /* Enable cache */
307 moveq #1, %d0
308 move.l %d0, icache_state
309 rts
310#endif
311
312#ifdef CONFIG_M5282
313 .globl icache_enable
314icache_enable:
315 move.l #0x01000000, %d0 /* Invalidate cache cmd */
316 movec %d0, %CACR /* Invalidate cache */
317 move.l #0x0000c000, %d0 /* Setup cache mask */
318 movec %d0, %ACR0 /* Enable cache */
319 move.l #0xff00c000, %d0 /* Setup cache mask */
320 movec %d0, %ACR1 /* Enable cache */
321 move.l #0x80400100, %d0 /* Setup cache mask, data cache disabel*/
322 movec %d0, %CACR /* Enable cache */
323 moveq #1, %d0
324 move.l %d0, icache_state
325 rts
326#endif
327
stroese8c725b92004-12-16 18:09:49 +0000[diff] [blame]328#ifdef CONFIG_M5249
329 .globl icache_enable
330icache_enable:
331 /*
332 * Note: The 5249 Documentation doesn't give a bit position for CINV!
333 * From the 5272 and the 5307 documentation, I have deduced that it is
334 * probably CACR[24]. Should someone say something to Motorola?
335 * ~Jeremy
336 */
337 move.l #0x01000000, %d0 /* Invalidate whole cache */
338 move.c %d0,%CACR
339 move.l #0xff00c000, %d0 /* Set FLASH cachable: always match (SM=0b10) */
340 move.c %d0, %ACR0
341 move.l #0x0000c000, %d0 /* Set SDRAM cachable: always match (SM=0b10) */
342 move.c %d0, %ACR1
343 move.l #0x90000200, %d0 /* Set cache enable cmd */
344 move.c %d0,%CACR
345 moveq #1, %d0
346 move.l %d0, icache_state
347 rts
348#endif
349
wdenkbf9e3b32004-02-12 00:47:09 +0000[diff] [blame]350 .globl icache_disable
351icache_disable:
352 move.l #0x00000100, %d0 /* Setup cache mask */
353 movec %d0, %CACR /* Enable cache */
354 clr.l %d0 /* Setup cache mask */
355 movec %d0, %ACR0 /* Enable cache */
356 movec %d0, %ACR1 /* Enable cache */
357 moveq #0, %d0
358 move.l %d0, icache_state
359 rts
360
361 .globl icache_status
362icache_status:
363 move.l icache_state, %d0
364 rts
365
366 .data
367icache_state:
368 .long 1
369
stroese8c725b92004-12-16 18:09:49 +0000[diff] [blame]370
wdenkbf9e3b32004-02-12 00:47:09 +0000[diff] [blame]371/*------------------------------------------------------------------------------*/
372
373 .globl version_string
374version_string:
375 .ascii U_BOOT_VERSION
376 .ascii " (", __DATE__, " - ", __TIME__, ")"
377 .ascii CONFIG_IDENT_STRING, "\0"