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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Beniamino Galvanif8d9ca12017-10-29 10:09:00 +01002/*
3 * (C) Copyright 2017 - Beniamino Galvani <b.galvani@gmail.com>
Beniamino Galvanif8d9ca12017-10-29 10:09:00 +01004 */
5#include <common.h>
Beniamino Galvanif8d9ca12017-10-29 10:09:00 +01006#include <asm/io.h>
Beniamino Galvani2e668af2018-06-14 13:43:40 +02007#include <clk.h>
Beniamino Galvanif8d9ca12017-10-29 10:09:00 +01008#include <dm.h>
9#include <i2c.h>
10
Beniamino Galvani8c47ab62017-11-26 17:40:55 +010011#define I2C_TIMEOUT_MS 100
Beniamino Galvanif8d9ca12017-10-29 10:09:00 +010012
13/* Control register fields */
14#define REG_CTRL_START BIT(0)
15#define REG_CTRL_ACK_IGNORE BIT(1)
16#define REG_CTRL_STATUS BIT(2)
17#define REG_CTRL_ERROR BIT(3)
18#define REG_CTRL_CLKDIV_SHIFT 12
19#define REG_CTRL_CLKDIV_MASK GENMASK(21, 12)
20#define REG_CTRL_CLKDIVEXT_SHIFT 28
21#define REG_CTRL_CLKDIVEXT_MASK GENMASK(29, 28)
22
23enum {
24 TOKEN_END = 0,
25 TOKEN_START,
26 TOKEN_SLAVE_ADDR_WRITE,
27 TOKEN_SLAVE_ADDR_READ,
28 TOKEN_DATA,
29 TOKEN_DATA_LAST,
30 TOKEN_STOP,
31};
32
33struct i2c_regs {
34 u32 ctrl;
35 u32 slave_addr;
36 u32 tok_list0;
37 u32 tok_list1;
38 u32 tok_wdata0;
39 u32 tok_wdata1;
40 u32 tok_rdata0;
41 u32 tok_rdata1;
42};
43
Guillaume La Roqued82dcc42019-03-22 14:49:32 +010044struct meson_i2c_data {
45 unsigned char div_factor;
46};
47
Beniamino Galvanif8d9ca12017-10-29 10:09:00 +010048struct meson_i2c {
Guillaume La Roqued82dcc42019-03-22 14:49:32 +010049 const struct meson_i2c_data *data;
Beniamino Galvani2e668af2018-06-14 13:43:40 +020050 struct clk clk;
Beniamino Galvanif8d9ca12017-10-29 10:09:00 +010051 struct i2c_regs *regs;
Beniamino Galvani50a69092017-11-26 17:40:57 +010052 struct i2c_msg *msg; /* Current I2C message */
53 bool last; /* Whether the message is the last */
54 uint count; /* Number of bytes in the current transfer */
55 uint pos; /* Position of current transfer in message */
56 u32 tokens[2]; /* Sequence of tokens to be written */
57 uint num_tokens; /* Number of tokens to be written */
Beniamino Galvanif8d9ca12017-10-29 10:09:00 +010058};
59
60static void meson_i2c_reset_tokens(struct meson_i2c *i2c)
61{
62 i2c->tokens[0] = 0;
63 i2c->tokens[1] = 0;
64 i2c->num_tokens = 0;
65}
66
67static void meson_i2c_add_token(struct meson_i2c *i2c, int token)
68{
69 if (i2c->num_tokens < 8)
70 i2c->tokens[0] |= (token & 0xf) << (i2c->num_tokens * 4);
71 else
72 i2c->tokens[1] |= (token & 0xf) << ((i2c->num_tokens % 8) * 4);
73
74 i2c->num_tokens++;
75}
76
Beniamino Galvani50a69092017-11-26 17:40:57 +010077/*
78 * Retrieve data for the current transfer (which can be at most 8
79 * bytes) from the device internal buffer.
80 */
Beniamino Galvanif8d9ca12017-10-29 10:09:00 +010081static void meson_i2c_get_data(struct meson_i2c *i2c, u8 *buf, int len)
82{
83 u32 rdata0, rdata1;
84 int i;
85
86 rdata0 = readl(&i2c->regs->tok_rdata0);
87 rdata1 = readl(&i2c->regs->tok_rdata1);
88
89 debug("meson i2c: read data %08x %08x len %d\n", rdata0, rdata1, len);
90
91 for (i = 0; i < min(4, len); i++)
92 *buf++ = (rdata0 >> i * 8) & 0xff;
93
94 for (i = 4; i < min(8, len); i++)
95 *buf++ = (rdata1 >> (i - 4) * 8) & 0xff;
96}
97
Beniamino Galvani50a69092017-11-26 17:40:57 +010098/*
99 * Write data for the current transfer (which can be at most 8 bytes)
100 * to the device internal buffer.
101 */
Beniamino Galvanif8d9ca12017-10-29 10:09:00 +0100102static void meson_i2c_put_data(struct meson_i2c *i2c, u8 *buf, int len)
103{
104 u32 wdata0 = 0, wdata1 = 0;
105 int i;
106
107 for (i = 0; i < min(4, len); i++)
108 wdata0 |= *buf++ << (i * 8);
109
110 for (i = 4; i < min(8, len); i++)
111 wdata1 |= *buf++ << ((i - 4) * 8);
112
113 writel(wdata0, &i2c->regs->tok_wdata0);
114 writel(wdata1, &i2c->regs->tok_wdata1);
115
116 debug("meson i2c: write data %08x %08x len %d\n", wdata0, wdata1, len);
117}
118
Beniamino Galvani50a69092017-11-26 17:40:57 +0100119/*
120 * Prepare the next transfer: pick the next 8 bytes in the remaining
121 * part of message and write tokens and data (if needed) to the
122 * device.
123 */
Beniamino Galvanif8d9ca12017-10-29 10:09:00 +0100124static void meson_i2c_prepare_xfer(struct meson_i2c *i2c)
125{
126 bool write = !(i2c->msg->flags & I2C_M_RD);
127 int i;
128
129 i2c->count = min(i2c->msg->len - i2c->pos, 8u);
130
131 for (i = 0; i + 1 < i2c->count; i++)
132 meson_i2c_add_token(i2c, TOKEN_DATA);
133
134 if (i2c->count) {
135 if (write || i2c->pos + i2c->count < i2c->msg->len)
136 meson_i2c_add_token(i2c, TOKEN_DATA);
137 else
138 meson_i2c_add_token(i2c, TOKEN_DATA_LAST);
139 }
140
141 if (write)
142 meson_i2c_put_data(i2c, i2c->msg->buf + i2c->pos, i2c->count);
143
144 if (i2c->last && i2c->pos + i2c->count >= i2c->msg->len)
145 meson_i2c_add_token(i2c, TOKEN_STOP);
146
147 writel(i2c->tokens[0], &i2c->regs->tok_list0);
148 writel(i2c->tokens[1], &i2c->regs->tok_list1);
149}
150
151static void meson_i2c_do_start(struct meson_i2c *i2c, struct i2c_msg *msg)
152{
153 int token;
154
155 token = (msg->flags & I2C_M_RD) ? TOKEN_SLAVE_ADDR_READ :
156 TOKEN_SLAVE_ADDR_WRITE;
157
158 writel(msg->addr << 1, &i2c->regs->slave_addr);
159 meson_i2c_add_token(i2c, TOKEN_START);
160 meson_i2c_add_token(i2c, token);
161}
162
163static int meson_i2c_xfer_msg(struct meson_i2c *i2c, struct i2c_msg *msg,
164 int last)
165{
166 ulong start;
167
168 debug("meson i2c: %s addr %u len %u\n",
169 (msg->flags & I2C_M_RD) ? "read" : "write",
170 msg->addr, msg->len);
171
172 i2c->msg = msg;
173 i2c->last = last;
174 i2c->pos = 0;
175 i2c->count = 0;
176
177 meson_i2c_reset_tokens(i2c);
178 meson_i2c_do_start(i2c, msg);
179
180 do {
181 meson_i2c_prepare_xfer(i2c);
182
183 /* start the transfer */
184 setbits_le32(&i2c->regs->ctrl, REG_CTRL_START);
185 start = get_timer(0);
186 while (readl(&i2c->regs->ctrl) & REG_CTRL_STATUS) {
187 if (get_timer(start) > I2C_TIMEOUT_MS) {
188 clrbits_le32(&i2c->regs->ctrl, REG_CTRL_START);
189 debug("meson i2c: timeout\n");
190 return -ETIMEDOUT;
191 }
192 udelay(1);
193 }
194 meson_i2c_reset_tokens(i2c);
195 clrbits_le32(&i2c->regs->ctrl, REG_CTRL_START);
196
197 if (readl(&i2c->regs->ctrl) & REG_CTRL_ERROR) {
198 debug("meson i2c: error\n");
Beniamino Galvani989bb922017-11-26 17:40:56 +0100199 return -EREMOTEIO;
Beniamino Galvanif8d9ca12017-10-29 10:09:00 +0100200 }
201
202 if ((msg->flags & I2C_M_RD) && i2c->count) {
203 meson_i2c_get_data(i2c, i2c->msg->buf + i2c->pos,
204 i2c->count);
205 }
206 i2c->pos += i2c->count;
207 } while (i2c->pos < msg->len);
208
209 return 0;
210}
211
212static int meson_i2c_xfer(struct udevice *bus, struct i2c_msg *msg,
213 int nmsgs)
214{
215 struct meson_i2c *i2c = dev_get_priv(bus);
216 int i, ret = 0;
217
218 for (i = 0; i < nmsgs; i++) {
219 ret = meson_i2c_xfer_msg(i2c, msg + i, i == nmsgs - 1);
220 if (ret)
Beniamino Galvani989bb922017-11-26 17:40:56 +0100221 return ret;
Beniamino Galvanif8d9ca12017-10-29 10:09:00 +0100222 }
223
224 return 0;
225}
226
227static int meson_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)
228{
229 struct meson_i2c *i2c = dev_get_priv(bus);
Beniamino Galvani2e668af2018-06-14 13:43:40 +0200230 ulong clk_rate;
Beniamino Galvanif8d9ca12017-10-29 10:09:00 +0100231 unsigned int div;
232
Beniamino Galvani2e668af2018-06-14 13:43:40 +0200233 clk_rate = clk_get_rate(&i2c->clk);
234 if (IS_ERR_VALUE(clk_rate))
235 return -EINVAL;
236
Guillaume La Roqued82dcc42019-03-22 14:49:32 +0100237 div = DIV_ROUND_UP(clk_rate, speed * i2c->data->div_factor);
Beniamino Galvanif8d9ca12017-10-29 10:09:00 +0100238
239 /* clock divider has 12 bits */
240 if (div >= (1 << 12)) {
241 debug("meson i2c: requested bus frequency too low\n");
242 div = (1 << 12) - 1;
243 }
244
245 clrsetbits_le32(&i2c->regs->ctrl, REG_CTRL_CLKDIV_MASK,
246 (div & GENMASK(9, 0)) << REG_CTRL_CLKDIV_SHIFT);
247
248 clrsetbits_le32(&i2c->regs->ctrl, REG_CTRL_CLKDIVEXT_MASK,
249 (div >> 10) << REG_CTRL_CLKDIVEXT_SHIFT);
250
Beniamino Galvani2e668af2018-06-14 13:43:40 +0200251 debug("meson i2c: set clk %u, src %lu, div %u\n", speed, clk_rate, div);
Beniamino Galvanif8d9ca12017-10-29 10:09:00 +0100252
253 return 0;
254}
255
256static int meson_i2c_probe(struct udevice *bus)
257{
258 struct meson_i2c *i2c = dev_get_priv(bus);
Beniamino Galvani2e668af2018-06-14 13:43:40 +0200259 int ret;
260
Guillaume La Roqued82dcc42019-03-22 14:49:32 +0100261 i2c->data = (const struct meson_i2c_data *)dev_get_driver_data(bus);
262
Beniamino Galvani2e668af2018-06-14 13:43:40 +0200263 ret = clk_get_by_index(bus, 0, &i2c->clk);
264 if (ret < 0)
265 return ret;
266
267 ret = clk_enable(&i2c->clk);
268 if (ret)
269 return ret;
Beniamino Galvanif8d9ca12017-10-29 10:09:00 +0100270
271 i2c->regs = dev_read_addr_ptr(bus);
272 clrbits_le32(&i2c->regs->ctrl, REG_CTRL_START);
273
274 return 0;
275}
276
277static const struct dm_i2c_ops meson_i2c_ops = {
278 .xfer = meson_i2c_xfer,
279 .set_bus_speed = meson_i2c_set_bus_speed,
280};
281
Guillaume La Roqued82dcc42019-03-22 14:49:32 +0100282static const struct meson_i2c_data i2c_meson6_data = {
283 .div_factor = 4,
284};
285
286static const struct meson_i2c_data i2c_gxbb_data = {
287 .div_factor = 4,
288};
289
290static const struct meson_i2c_data i2c_axg_data = {
291 .div_factor = 3,
292};
293
Beniamino Galvanif8d9ca12017-10-29 10:09:00 +0100294static const struct udevice_id meson_i2c_ids[] = {
Guillaume La Roqued82dcc42019-03-22 14:49:32 +0100295 {.compatible = "amlogic,meson6-i2c", .data = (ulong)&i2c_meson6_data},
296 {.compatible = "amlogic,meson-gx-i2c", .data = (ulong)&i2c_gxbb_data},
297 {.compatible = "amlogic,meson-gxbb-i2c", .data = (ulong)&i2c_gxbb_data},
298 {.compatible = "amlogic,meson-axg-i2c", .data = (ulong)&i2c_axg_data},
299 {}
Beniamino Galvanif8d9ca12017-10-29 10:09:00 +0100300};
301
302U_BOOT_DRIVER(i2c_meson) = {
303 .name = "i2c_meson",
304 .id = UCLASS_I2C,
305 .of_match = meson_i2c_ids,
306 .probe = meson_i2c_probe,
307 .priv_auto_alloc_size = sizeof(struct meson_i2c),
308 .ops = &meson_i2c_ops,
309};