blob: 15082c4195078db3b8d6265571b809c5cc3131a2 [file] [log] [blame]
Tom Warrenf7dc4ac2014-01-24 12:46:18 -07001/*
2 * (C) Copyright 2013-2014
3 * NVIDIA Corporation <www.nvidia.com>
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8#include <common.h>
9#include <asm-generic/gpio.h>
10#include <asm/arch/gpio.h>
11#include <asm/arch/gp_padctrl.h>
12#include <asm/arch/pinmux.h>
13#include "pinmux-config-venice2.h"
14#include <i2c.h>
15
16/*
17 * Routine: pinmux_init
18 * Description: Do individual peripheral pinmux configs
19 */
20void pinmux_init(void)
21{
Stephen Warrendfb42fc2014-03-21 12:28:56 -060022 pinmux_config_pingrp_table(tegra124_pinmux_set_nontristate,
23 ARRAY_SIZE(tegra124_pinmux_set_nontristate));
Tom Warrenf7dc4ac2014-01-24 12:46:18 -070024
Stephen Warrendfb42fc2014-03-21 12:28:56 -060025 pinmux_config_pingrp_table(tegra124_pinmux_common,
26 ARRAY_SIZE(tegra124_pinmux_common));
Tom Warrenf7dc4ac2014-01-24 12:46:18 -070027
Stephen Warrendfb42fc2014-03-21 12:28:56 -060028 pinmux_config_pingrp_table(unused_pins_lowpower,
29 ARRAY_SIZE(unused_pins_lowpower));
Tom Warrenf7dc4ac2014-01-24 12:46:18 -070030
31 /* Initialize any non-default pad configs (APB_MISC_GP regs) */
Stephen Warrendfb42fc2014-03-21 12:28:56 -060032 pinmux_config_drvgrp_table(venice2_padctrl,
33 ARRAY_SIZE(venice2_padctrl));
Tom Warrenf7dc4ac2014-01-24 12:46:18 -070034}