Mike Frysinger | 59ac972 | 2008-10-12 23:22:25 -0400 | [diff] [blame] | 1 | /* |
| 2 | * U-boot - Configuration file for CSP Minotaur board |
| 3 | * |
| 4 | * Thu Oct 25 15:30:44 CEST 2007 <hackfin@section5.ch> |
| 5 | * Minotaur config, brushed up for official uClinux dist. |
| 6 | * Parallel flash support disabled, SPI flash boot command |
| 7 | * added ('run flashboot'). |
| 8 | * |
| 9 | * Flash image map: |
| 10 | * |
| 11 | * 0x00000000 u-boot bootstrap |
| 12 | * 0x00010000 environment |
| 13 | * 0x00020000 u-boot code |
| 14 | * 0x00030000 uImage.initramfs |
| 15 | * |
| 16 | */ |
| 17 | |
| 18 | #ifndef __CONFIG_BF537_SRV1_H__ |
| 19 | #define __CONFIG_BF537_SRV1_H__ |
| 20 | |
Mike Frysinger | f348ab8 | 2009-04-24 17:22:40 -0400 | [diff] [blame] | 21 | #include <asm/config-pre.h> |
Mike Frysinger | 59ac972 | 2008-10-12 23:22:25 -0400 | [diff] [blame] | 22 | |
| 23 | |
| 24 | /* |
| 25 | * Processor Settings |
| 26 | */ |
Mike Frysinger | fbcf8e8 | 2010-12-23 14:58:37 -0500 | [diff] [blame] | 27 | #define CONFIG_BFIN_CPU bf537-0.2 |
Mike Frysinger | 59ac972 | 2008-10-12 23:22:25 -0400 | [diff] [blame] | 28 | #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_SPI_MASTER |
| 29 | |
| 30 | |
| 31 | /* |
| 32 | * Clock Settings |
| 33 | * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV |
| 34 | * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV |
| 35 | */ |
| 36 | /* CONFIG_CLKIN_HZ is any value in Hz */ |
| 37 | #define CONFIG_CLKIN_HZ 22118400 |
| 38 | /* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */ |
| 39 | /* 1 = CLKIN / 2 */ |
| 40 | #define CONFIG_CLKIN_HALF 0 |
| 41 | /* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */ |
| 42 | /* 1 = bypass PLL */ |
| 43 | #define CONFIG_PLL_BYPASS 0 |
| 44 | /* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */ |
| 45 | /* Values can range from 0-63 (where 0 means 64) */ |
| 46 | #define CONFIG_VCO_MULT 20 |
| 47 | /* CCLK_DIV controls the core clock divider */ |
| 48 | /* Values can be 1, 2, 4, or 8 ONLY */ |
| 49 | #define CONFIG_CCLK_DIV 1 |
| 50 | /* SCLK_DIV controls the system clock divider */ |
| 51 | /* Values can range from 1-15 */ |
| 52 | #define CONFIG_SCLK_DIV 5 |
| 53 | |
| 54 | |
| 55 | /* |
| 56 | * Memory Settings |
| 57 | */ |
| 58 | #define CONFIG_MEM_SIZE 32 |
| 59 | #define CONFIG_MEM_ADD_WDTH 9 |
| 60 | |
| 61 | #define CONFIG_EBIU_SDRRC_VAL 0x2ac |
| 62 | #define CONFIG_EBIU_SDGCTL_VAL 0x91110d |
| 63 | |
| 64 | #define CONFIG_EBIU_AMGCTL_VAL 0xFF |
| 65 | #define CONFIG_EBIU_AMBCTL0_VAL 0x7BB07BB0 |
| 66 | #define CONFIG_EBIU_AMBCTL1_VAL 0xFFC27BB0 |
| 67 | |
| 68 | #define CONFIG_SYS_MONITOR_LEN (256 << 10) |
| 69 | #define CONFIG_SYS_MALLOC_LEN (384 << 10) |
| 70 | |
| 71 | |
| 72 | /* |
| 73 | * Network Settings |
| 74 | */ |
| 75 | #ifndef __ADSPBF534__ |
| 76 | #define CONFIG_BFIN_MAC |
| 77 | #define CONFIG_NETCONSOLE 1 |
Mike Frysinger | 59ac972 | 2008-10-12 23:22:25 -0400 | [diff] [blame] | 78 | #endif |
| 79 | #ifdef CONFIG_BFIN_MAC |
| 80 | #define CONFIG_IPADDR 192.168.0.15 |
| 81 | #define CONFIG_NETMASK 255.255.255.0 |
| 82 | #define CONFIG_GATEWAYIP 192.168.0.1 |
| 83 | #define CONFIG_SERVERIP 192.168.0.2 |
| 84 | #define CONFIG_HOSTNAME bf537-srv1 |
| 85 | #endif |
| 86 | |
| 87 | #define CONFIG_SYS_AUTOLOAD "no" |
| 88 | #define CONFIG_ROOTPATH /romfs |
Mike Frysinger | 8d1fea2 | 2009-07-16 19:05:30 -0400 | [diff] [blame] | 89 | /* Uncomment next line to use fixed MAC address */ |
| 90 | /* #define CONFIG_ETHADDR 02:80:ad:20:31:42 */ |
Mike Frysinger | 59ac972 | 2008-10-12 23:22:25 -0400 | [diff] [blame] | 91 | |
| 92 | |
| 93 | /* |
| 94 | * Flash Settings |
| 95 | */ |
| 96 | /* We don't have a parallel flash chip there */ |
| 97 | #define CONFIG_SYS_NO_FLASH |
| 98 | |
| 99 | |
| 100 | /* |
| 101 | * SPI Settings |
| 102 | */ |
| 103 | #define CONFIG_BFIN_SPI |
| 104 | #define CONFIG_ENV_SPI_MAX_HZ 30000000 |
Mike Frysinger | afac8b0 | 2009-06-14 22:29:35 -0400 | [diff] [blame] | 105 | #define CONFIG_SF_DEFAULT_SPEED 30000000 |
Mike Frysinger | 59ac972 | 2008-10-12 23:22:25 -0400 | [diff] [blame] | 106 | #define CONFIG_SPI_FLASH |
| 107 | #define CONFIG_SPI_FLASH_STMICRO |
| 108 | |
| 109 | |
| 110 | /* |
| 111 | * Env Storage Settings |
| 112 | */ |
| 113 | #define CONFIG_ENV_IS_IN_SPI_FLASH |
| 114 | #define CONFIG_ENV_OFFSET 0x10000 |
| 115 | #define CONFIG_ENV_SIZE 0x10000 |
| 116 | #define CONFIG_ENV_SECT_SIZE 0x10000 |
Mike Frysinger | 76d8218 | 2009-07-21 22:17:36 -0400 | [diff] [blame] | 117 | #define CONFIG_ENV_IS_EMBEDDED_IN_LDR |
Mike Frysinger | 59ac972 | 2008-10-12 23:22:25 -0400 | [diff] [blame] | 118 | |
| 119 | |
| 120 | /* |
| 121 | * I2C settings |
| 122 | */ |
| 123 | #define CONFIG_BFIN_TWI_I2C 1 |
| 124 | #define CONFIG_HARD_I2C 1 |
| 125 | #define CONFIG_SYS_I2C_SPEED 50000 |
| 126 | #define CONFIG_SYS_I2C_SLAVE 0 |
| 127 | |
| 128 | |
| 129 | /* |
| 130 | * Misc Settings |
| 131 | */ |
| 132 | #define CONFIG_SYS_LONGHELP 1 |
| 133 | #define CONFIG_CMDLINE_EDITING 1 |
| 134 | #define CONFIG_ENV_OVERWRITE 1 |
| 135 | #define CONFIG_MISC_INIT_R |
| 136 | |
| 137 | #define CONFIG_BAUDRATE 115200 |
| 138 | #define CONFIG_UART_CONSOLE 0 |
| 139 | |
| 140 | #define CONFIG_PANIC_HANG 1 |
| 141 | #define CONFIG_RTC_BFIN 1 |
| 142 | #define CONFIG_BOOT_RETRY_TIME -1 |
| 143 | #define CONFIG_LOADS_ECHO 1 |
| 144 | |
| 145 | #if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_UART) |
| 146 | # define CONFIG_BOOTDELAY -1 |
| 147 | #else |
| 148 | # define CONFIG_BOOTDELAY 5 |
| 149 | #endif |
| 150 | |
| 151 | #include <config_cmd_default.h> |
| 152 | |
| 153 | #ifdef CONFIG_BFIN_MAC |
| 154 | # define CONFIG_CMD_DHCP |
| 155 | # define CONFIG_CMD_PING |
| 156 | #else |
| 157 | # undef CONFIG_CMD_NET |
Mike Frysinger | 42246c3 | 2010-12-22 23:26:08 -0500 | [diff] [blame] | 158 | # undef CONFIG_CMD_NFS |
Mike Frysinger | 59ac972 | 2008-10-12 23:22:25 -0400 | [diff] [blame] | 159 | #endif |
| 160 | |
| 161 | #define CONFIG_CMD_BOOTLDR |
| 162 | #define CONFIG_CMD_CACHE |
| 163 | #define CONFIG_CMD_DATE |
| 164 | #define CONFIG_CMD_ELF |
| 165 | #undef CONFIG_CMD_FLASH |
| 166 | #define CONFIG_CMD_I2C |
| 167 | #undef CONFIG_CMD_IMLS |
| 168 | #define CONFIG_CMD_SF |
| 169 | |
| 170 | #define CONFIG_BOOTCOMMAND "run flashboot" |
| 171 | #define CONFIG_BOOTARGS "root=/dev/mtdblock0 rw" |
| 172 | #define CONFIG_SYS_PROMPT "srv1> " |
| 173 | |
| 174 | #define BOOT_ENV_SETTINGS \ |
| 175 | "update=tftpboot $(loadaddr) u-boot.ldr;" \ |
| 176 | "sf probe " MK_STR(BFIN_BOOT_SPI_SSEL) ";" \ |
| 177 | "sf erase 0 0x30000;" \ |
| 178 | "sf write $(loadaddr) 0 $(filesize)" \ |
| 179 | "flashboot=sf read 0x1000000 0x30000 0x320000;" \ |
| 180 | "bootm 0x1000000\0" |
| 181 | #ifdef CONFIG_BFIN_MAC |
| 182 | # define NETWORK_ENV_SETTINGS \ |
| 183 | "nfsargs=setenv bootargs root=/dev/nfs rw " \ |
| 184 | "nfsroot=$(serverip):$(rootpath)\0" \ |
| 185 | "addip=setenv bootargs $(bootargs) " \ |
| 186 | "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)" \ |
| 187 | ":$(hostname):eth0:off\0" \ |
| 188 | "ramboot=tftpboot $(loadaddr) linux;" \ |
| 189 | "run ramargs;run addip;bootelf\0" \ |
| 190 | "nfsboot=tftpboot $(loadaddr) linux;" \ |
| 191 | "run nfsargs;run addip;bootelf\0" |
| 192 | #else |
| 193 | # define NETWORK_ENV_SETTINGS |
| 194 | #endif |
| 195 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 196 | NETWORK_ENV_SETTINGS \ |
| 197 | "ramargs=setenv bootargs " CONFIG_BOOTARGS "\0" \ |
| 198 | BOOT_ENV_SETTINGS |
| 199 | |
Mike Frysinger | 59ac972 | 2008-10-12 23:22:25 -0400 | [diff] [blame] | 200 | #endif |