| Weijie Gao | 76880b0 | 2020-11-12 16:35:56 +0800 | [diff] [blame] | 1 | CONFIG_MIPS=y |
| Tom Rini | a2ac2b9 | 2021-08-27 21:18:30 -0400 | [diff] [blame] | 2 | CONFIG_SKIP_LOWLEVEL_INIT=y |
| Tom Rini | 9802154 | 2021-11-01 12:19:22 +0000 | [diff] [blame] | 3 | CONFIG_SYS_MALLOC_LEN=0x100000 |
| Weijie Gao | 76880b0 | 2020-11-12 16:35:56 +0800 | [diff] [blame] | 4 | CONFIG_SPL_LIBCOMMON_SUPPORT=y |
| 5 | CONFIG_SPL_LIBGENERIC_SUPPORT=y |
| 6 | CONFIG_NR_DRAM_BANKS=1 |
| 7 | CONFIG_ENV_SIZE=0x1000 |
| 8 | CONFIG_ENV_OFFSET=0x30000 |
| 9 | CONFIG_ENV_SECT_SIZE=0x10000 |
| Tom Rini | 2bba780 | 2021-06-28 10:17:29 -0400 | [diff] [blame] | 10 | CONFIG_DEFAULT_DEVICE_TREE="mediatek,mt7620-mt7530-rfb" |
| Simon Glass | 2a73606 | 2021-08-08 12:20:12 -0600 | [diff] [blame] | 11 | CONFIG_SPL_SERIAL=y |
| Weijie Gao | 76880b0 | 2020-11-12 16:35:56 +0800 | [diff] [blame] | 12 | CONFIG_SPL_SYS_MALLOC_F_LEN=0x40000 |
| 13 | CONFIG_SPL=y |
| 14 | CONFIG_DEBUG_UART_BASE=0xb0000c00 |
| 15 | CONFIG_DEBUG_UART_CLOCK=40000000 |
| Tom Rini | d46e86d | 2022-04-08 13:36:51 -0400 | [diff] [blame] | 16 | CONFIG_SYS_LOAD_ADDR=0x80010000 |
| Weijie Gao | 76880b0 | 2020-11-12 16:35:56 +0800 | [diff] [blame] | 17 | CONFIG_ARCH_MTMIPS=y |
| 18 | CONFIG_BOARD_MT7620_MT7530_RFB=y |
| Tom Rini | a2ac2b9 | 2021-08-27 21:18:30 -0400 | [diff] [blame] | 19 | CONFIG_MIPS_CACHE_SETUP=y |
| 20 | CONFIG_MIPS_CACHE_DISABLE=y |
| Weijie Gao | 76880b0 | 2020-11-12 16:35:56 +0800 | [diff] [blame] | 21 | CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y |
| 22 | CONFIG_MIPS_BOOT_FDT=y |
| 23 | CONFIG_DEBUG_UART=y |
| Weijie Gao | 76880b0 | 2020-11-12 16:35:56 +0800 | [diff] [blame] | 24 | CONFIG_FIT=y |
| 25 | # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set |
| Tom Rini | 167f699 | 2022-05-12 16:45:08 -0400 | [diff] [blame] | 26 | CONFIG_SYS_MALLOC_BOOTPARAMS=y |
| Tom Rini | ca8a329 | 2022-05-16 17:20:26 -0400 | [diff] [blame] | 27 | CONFIG_SPL_MAX_SIZE=0x10000 |
| Tom Rini | 6600b35 | 2022-05-27 10:19:45 -0400 | [diff] [blame] | 28 | CONFIG_SPL_BSS_START_ADDR=0x80010000 |
| Tom Rini | 9b5f9ae | 2022-05-19 15:09:22 -0400 | [diff] [blame] | 29 | CONFIG_SPL_BSS_MAX_SIZE=0x10000 |
| Weijie Gao | 76880b0 | 2020-11-12 16:35:56 +0800 | [diff] [blame] | 30 | CONFIG_SPL_SYS_MALLOC_SIMPLE=y |
| 31 | CONFIG_SPL_NOR_SUPPORT=y |
| Tom Rini | c45568c | 2022-06-25 19:29:46 -0400 | [diff] [blame] | 32 | CONFIG_SYS_BOOTM_LEN=0x1000000 |
| Weijie Gao | 76880b0 | 2020-11-12 16:35:56 +0800 | [diff] [blame] | 33 | # CONFIG_CMD_ELF is not set |
| 34 | # CONFIG_CMD_XIMG is not set |
| 35 | # CONFIG_CMD_CRC32 is not set |
| 36 | # CONFIG_CMD_DM is not set |
| 37 | CONFIG_CMD_GPIO=y |
| 38 | # CONFIG_CMD_LOADS is not set |
| 39 | CONFIG_CMD_SPI=y |
| 40 | # CONFIG_CMD_NFS is not set |
| 41 | CONFIG_CMD_MII=y |
| 42 | # CONFIG_CMD_MDIO is not set |
| Weijie Gao | 76880b0 | 2020-11-12 16:35:56 +0800 | [diff] [blame] | 43 | CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clocks clock-names interrupt-parent interrupts resets reset-names" |
| 44 | CONFIG_ENV_IS_IN_SPI_FLASH=y |
| 45 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
| 46 | CONFIG_NET_RANDOM_ETHADDR=y |
| 47 | CONFIG_SPL_DM=y |
| 48 | # CONFIG_SIMPLE_BUS is not set |
| 49 | # CONFIG_SPL_SIMPLE_BUS is not set |
| 50 | CONFIG_GPIO_HOG=y |
| 51 | # CONFIG_INPUT is not set |
| 52 | CONFIG_SPI_FLASH_SFDP_SUPPORT=y |
| 53 | CONFIG_SPI_FLASH_EON=y |
| 54 | CONFIG_SPI_FLASH_GIGADEVICE=y |
| 55 | CONFIG_SPI_FLASH_ISSI=y |
| 56 | CONFIG_SPI_FLASH_MACRONIX=y |
| 57 | CONFIG_SPI_FLASH_SPANSION=y |
| 58 | CONFIG_SPI_FLASH_STMICRO=y |
| 59 | CONFIG_SPI_FLASH_WINBOND=y |
| 60 | CONFIG_SPI_FLASH_XMC=y |
| 61 | CONFIG_MT7620_ETH=y |
| 62 | CONFIG_SPECIFY_CONSOLE_INDEX=y |
| 63 | CONFIG_DEBUG_UART_SHIFT=2 |
| 64 | CONFIG_SPI=y |
| 65 | CONFIG_MT7620_SPI=y |
| 66 | CONFIG_LZMA=y |
| 67 | CONFIG_SPL_LZMA=y |